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您好。我正在编写一个代码,通过SPI连接一个7HC595到PIC18F2550。一切都很好,然后我把把数据发送到595的部分移到一个函数中,出现了问题。首先,这里是实际的代码:Anim创建了一个光效(LED连接到7HC595)。它应该使LED从QA的595到QH,然后从QA转向QH,创建一个简单的追赶者。这种效应是正确的,尽管它正在从QC转向QH,然后转向QA和QB(以同样的方式关闭)。就像数据被“转移”了,我不知道为什么!我已经测试了WCOL位并且没有出错(从来没有被设置)。RCLK是寄存器时钟,如果是595。PIC时钟源为锁相环的48兆赫输出,20MHz的晶体馈电。在PIC和7HC595附近去耦上限(100NF)。我写了一个更简单的代码,没有SPIX写函数(函数内部的代码在(1)循环中)和for循环(I是用IF语句的一个简单的测试来增加或清除“i”值),它是按预期工作的。为什么我的数据移动了?????
以上来自于百度翻译 以下为原文 Hello. I was writting a code to connect a 74HC595 to PIC18F2550 via SPI. Everthing was working fine, then I moved the part of the main that send the data to 595 to a function, and problems appeared. First, here is the actual code: /* * File: main.c * Author: Stephen * * Created on 3 de Julho de 2017, 09:49 */ // PIC18F2550 Configuration Bit Settings // 'C' source line config statements // CONFIG1L #pragma config PLLDIV = 5 // PLL Prescaler Selection bits (Divide by 5 (20 MHz oscillator input)) #pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2]) #pragma config USBDIV = 1 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale) // CONFIG1H #pragma config FOSC = HSPLL_HS // Oscillator Selection bits (HS oscillator, PLL enabled (HSPLL)) #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) // CONFIG2L #pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled) #pragma config BOR = ON // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled)) #pragma config BORV = 0 // Brown-out Reset Voltage bits (Maximum setting 4.59V) #pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled) // CONFIG2H #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) #pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) // CONFIG3H #pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1) #pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset) #pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation) #pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) // CONFIG4L #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset) #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled) #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) // CONFIG5L #pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected) #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected) #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected) #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected) // CONFIG5H #pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected) #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected) // CONFIG6L #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected) #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected) #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected) #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected) // CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected) #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected) #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected) // CONFIG7L #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks) #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks) #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks) #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks) // CONFIG7H #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks) #define _XTAL_FREQ 48000000 #include #include "delays.h" #define RCLK LATB0 const unsigned char anim[16] = {0, 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF, 0xFE, 0xFC, 0xF8, 0xF0, 0xE0, 0xC0, 0x80}; void SPI_Write(unsigned char data) { SSPBUF = data; while(!SSPIF); RCLK = 1; __delay_us(1); RCLK = 0; __delay_us(1); } void main(void) { unsigned char i; TRISC = 0; TRISB = 0; SSPSTAT = 0x40; SSPCON1 = 0x20; SSPIF = 0; __delay_ms(100); while(1) { for(i = 0; i < 16; i++) { SPI_Write(anim); delay_ms(50); } for(i = 15; i > 0; i--) { SPI_Write(anim); delay_ms(50); } } } Anim creates a patern of light effect (LEDs are connected to 74HC595). It should turn LEDs on from QA of 595 to QH and then turn of from QA to QH, creating a simple chaser. The effect is right, despite it's turning on from QC to QH and then QA and QB (turning off the same way). It's like data was "shifted", and I have no idea why! I already tested WCOL bit and got nothing wrong (never was set). RCLK is the register clock if 595. PIC Clock source is 48MHz output of PLL, fed by 20MHz Crystal. Decoupling caps (100nF) near PIC and 74HC595. I wrote before a simpler code, without SPI_Write function (the code inside function was inside while(1) loop) and for loop (I was using a simple test with if statement to increment or clear "i" value) and it was working as expected. Why is my data shifted??? |
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9个回答
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你知道以下几点吗????SPI的移位方向通常默认为LSBIT -导致QH保持LSBIT,QA为MSBIT。时钟极性和时钟相位必须被配置为满足595的需求。如果您之前的实现是“位敲击”:根据您的比特敲击TI配置TZE SPI。明。这应该行得通。
以上来自于百度翻译 以下为原文 Are you aware of the following ???
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正如我所说,我成功地编写了一个代码相同的MSSP模块配置,一切都运行良好。(至少我想,一旦在工作代码上,QA保持了BIT0的数据和QH BIT7)。我不知道什么是BIT BUG。
以上来自于百度翻译 以下为原文 Well, as I said, I successfully wrote another code with same MSSP module configuration and everything was working well. (At least I think so, once on the working code QA was holding bit0 of data and QH bit7). And I have no idea what is bit-banging. |
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我从来没有听说过,至少在标准SPI,但哦好
以上来自于百度翻译 以下为原文 I never heard of this, at least in standard SPI, but oh well |
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在软件控制下切换(GPIO)引脚(设置输出)…明确的输出序列)。您似乎需要ISCKP=0,CKE=1(上升沿上的595个锁存器)。我检查了2550数据表:这个SPI首先移动MSBIT(不可配置)SSPSTAT和SSPCON1看起来很好……另一个问题:您的电源电压是多少?
以上来自于百度翻译 以下为原文 bit-banging aka bit-bashing is toggling some (GPIO) pin under software control (set output ... clear output sequences). What you seem to need is
Another question: what is your supply voltage ? |
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5伏从一个PC电源(这是我的廉价工作台供应)为PIC和595。我用来控制7HC595与位砰砰,不知道哈哈,我想使用SPI简化我的代码。
以上来自于百度翻译 以下为原文 5 volts from a PC power supply (this is my cheap bench supply) for either PIC and 595. I used to control 74HC595 with bit-banging and didn't know haha I want to use SPI to simplify my code. |
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OK - @ 5 V,595应该能够应付12兆赫。…应该…也许把速度从1/4降低到1/16会改善这种情况,那就附加一个范围和测量时钟和数据ON呢?
以上来自于百度翻译 以下为原文 OK - @ 5 V the 595 should be able to cope with 12 MHz. ... should ... Maybe reducing the speed from 1/4 to 1/16 will improve the situation. What about attaching a scope and measuring the clock and data oine ? |
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我会尽量降低时钟速度。1微秒的延迟对于595的寄存器时钟来说是很大的?示波器将是有用的,但我没有它:CI计划购买一个(类似于:[链接=http://www. fimiPeffop.com /PD-475 67 BK-OSCILSOCOPIO数字DIO-DSO150-CO-CASE .html)] http://www. FiiPeLopop.com…-dSO150 COM Case.html)[/Link ] *解决*减少时钟ASDU000 00 01说解决了BUG!此外,增加到2μs产生RCLK信号的延迟。虽然时钟在595的范围内,但原电路板和线电容会使信号混乱。谢谢大家!P.S:我想有些管理员会把这个线程移到8位微控制器的主题。对不起,把它放错地方了。
以上来自于百度翻译 以下为原文 I'll try to reduce clock speed. That delay of 1 microsecond is great for register clock of 595? An Oscilloscope would be useful, but I don't have it :c I'm planning to buy one (like this: [link=http://www.filipeflop.com/pd-47567b-kit-osciloscopio-digital-diy-dso150-com-case.html)]http://www.filipeflop.com...-dso150-com-case.html)[/link] *SOLVED* Reducing clock as du00000001 said solved the bug! Also, increased to 2 us the delay to generate the RCLK signal. Although clock is inside 595's limits, maybe protoboard and wire capacitance was messing up signals. Thanks guys! P.S: I think some admin would move this thread to 8-bit Microcontrollers topic. Sorry for posting it on wrong place. |
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“FLIPPEROP”的范围对于合理的数字发展来说太慢了。一些中国的2通道范围(最小50)。100 MHz模拟带宽,500。建议1000 MSPS。另一种选择:LabStand的SwitcSee(参见:HealHTTPS://www. elkto.com….t&&;
以上来自于百度翻译 以下为原文 The 'flipeflop' scope is way too slow for reasonable digital developments. Some chinese 2-channel scope (min. 50 .. 100 MHz analog bandwidth, 500 .. 1000MSPS) is recommended. An alternative: LabNation's Smartscope (see eg. here https://www.elektor.com/s...t&___from_store=de ) More channels are always desirable, but add a hefty premium. Good luck! |
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顺便说一句:我不认为RCLK是问题所在。最可能的是一些数据设置时间违反(移位数据和SRCLK之间的关系)。
以上来自于百度翻译 以下为原文 BTW: I don't think that RCLK was the problem. Most likely some data setup time violation (relation between the shifted data and SRCLK. |
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