如何添加具有多个端口的动量

嗨Leyo，在我评论组件端​​口之前，让我提一下模拟晶体管端口的常见错误。
如果将端口放在多边形的边缘，则该边缘*的整个宽度将用于端口连接。
如果您的晶体管端子宽度小于边缘，则实际硬件中的电流（小端子宽度）将与EM仿真中的电流（整个多边形宽度上的宽连接）不同，并且EM结果将与现实不同。
要获得此类匹配网络的准确结果，您需要确保端口宽度等于设备终端宽度。
有多种方法可以做到这一点，如本主题所述：功率放大器匹配网络模拟动力从我过去在EM支持方面的工作中，我记得多次出现PA匹配网络的EM模拟因错误而错误的情况。
端口宽度对于这些匹配网络非常重要！
关于您关于SMD元件端口的问题，我同意您应该通过2端口仿真（无SMD端口）和3端口仿真（EM模型中端口3处的SMD，原理图级别的开路）获得类似结果。
不同的结果表明出现了问题。
您的端口3位于多边形的边缘，因此端口将跨越多边形的整个边缘。
这不是你想要的！
要在SMD位置建立“点”连接，请将Momentum端口移动到金属区域内。
现在，这将在该位置创建“点”连接。
此外，它将关闭此端口的校准，这是可以的。
如果再次测试2端口与3端口方案，则在进行更改后，您应该看到更好的协议。



     以下为原文

  Hi Leyo,

before I comment on the component port, let me mention a common error in simulation the transistor-side port. If you place the port on the edge of the polygon, the *entire width of that edge* will be used for the port connection. If your transistor terminal width is smaller than the edge, the current in your real hardware (small terminal width) will be different from the current in EM simulation (wide connection over the entire polygon width) and EM results will be different from reality. 

To get accurate results for such matching networks, you need to make sure that the port width is equal to the devices terminal width. There are multiple ways to do that, as described in this thread:
Power Amplifier Matching network simulation in Momentum 

From my past work in EM support, I remember multiple cases where EM simulation of PA matching networks was really wrong due to that mistake. Port width is really important for these matching networks!

Regarding your question on the SMD component port, I agree that you should get similar results with 2-port simulation (no SMD port) and 3-port simulation (SMD at port 3 in EM model, which is open circuit at schematic level). Different results indicate that something is wrong. 
Your port 3 is on the edge of the polygon, so again the port will span across the entire with of the polygon. This is not what you want! To make a "point" connection at the SMD location, move the Momentum port inside the metal area. Now, this will create a "point" connection at that location. Also, it will switch off calibration for this port, which is ok here.

If you test the 2-port vs. 3-port scenario again, after making that change, you should see much better agreement.

嗨，请找到附加的工作区。
Cell1有两个端口，cell3有三个端口（Port3作为内部端口）。
我看到模拟结果有很大差异。
很想知道我的错误。



     以下为原文

  Hi,
Please find attached workspace. Cell1 has two ports and cell3 has three ports (With Port3 as internal port). I am seeing big difference in the  simulation results. Curious to know my mistake.

附件

• MyWorkspace_Mom_wrk.7zads72.6 KB
  

错误在于您通过查看S11来评估3端口模拟。
这是输入阻抗将*所有*其他端口终止为50欧姆。
所以你的SMD端口连接了50欧姆，这显然不同于那里的开路。
如果要比较3端口模拟，则需要在端口3开路时进行此操作。
参见附图比较1和模拟结果比较2。
在附带的工作中，我还添加了宽的去嵌入馈线来模仿晶体管端子宽度。
见附图比较3。
这不是正确的维度，只是为了表明这个想法。
您需要更改此设置以使用正确的终端宽度。
工作区已附加。
compare1.PNG5.7 KBcompare3.PNG11.5 KBcompare2.PNG20.0 KB



     以下为原文

  The mistake is that you evaluated the 3-port simulation by looking at S11. This is the input impedance will *all* other ports terminated into 50 Ohm. So you have 50 ohm connected at your SMD port, which is obviously different from having an open circuit there. 

If you want to compare the 3-port simulation, you need to do this with port 3 open circuited. See attached picture compare1, and simulation result compare2.

In the attached workpsace, I also added the wide de-embedded feedline to imitate the transistor terminal width. See attached picture compare3. This is not the correct dimension, only to show the idea. You need to change this to use your correct terminal width.

Workspace is attached.

附件

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• compare1.PNG5.7 KB
  
• compare3.PNG11.5 KB
  
• compare2.PNG20.0 KB
  

谢谢..现在很清楚了。
当我在EM模式下进行模拟时（在Momentum EM设置中），带有2个端口的S11给出标准化的0.32-j0.389，三个端口给出0.357-j0.157。
当我把它作为布局组件用三端口模型的P3打开时，两个端口和三个端口给出0.323-j0.389的输入阻抗。
合理。
当P3以50欧姆终止时，双端口模型给出0.323-j0.389，三端口模型给出0.357-j0.157。
再有意义。
在这些情况下，我认为我不需要进行EM仿真...只需将其作为布局组件，并在原理图视图中进行模拟，并进行正确的终止。
（我正处于EM模拟的开始阶段!!!）对此有更多疑问？
1.在EDGE上P1的位置是否会对模拟结果产生影响？
我可以把P1放在EDGE上的任何一点，对吧。
我的地平面靠近了痕迹，我没有在这里添加。
这架地平面会对结果产生很大影响吗？
我对端口的校准有点困惑。
让我们在实验室中进行真正的网络分析仪测量。
我已将P2连接到VNA的端口2，VNA的端口1连接到P1的位置。
我会测量相同的0.323-j0.389吗？
根据以前的经验，我注意到结果取决于我焊接VNA端口1的位置。
你能解释一下吗？



     以下为原文

  Thanks.. It is much clear now.
When I do the simulation in EM mode (In Momentum EM Set up), S11 with 2 ports gives normalized 0.32-j0.389 and three port gives 0.357-j0.157.
When I bring this as layout component  With P3 of three port model open, two port and three port gives input impedance of  0.323-j0.389. Make sense.
When P3 is terminated with 50 ohms, Two port model gives 0.323-j0.389 and three port model gives 0.357-j0.157. Again make sense.
In these situations, I think I need not do the EM simulation...just bring this as layout component and do the simulation in schematic view with correct terminations.
(I am in the beginning stage of EM simulations !!!)

Couple more question on this?

1. Will the position of P1  on the EDGE make a  difference in the simulated results?. I  can place the P1 at any point on the EDGE, right.
2. I have ground plane near to the traces and I haven't added here. Will this ground plane make big difference in the results?
3. I am little bit confused about the calibration of the ports. Let us take the real Network Analyzer measurements in the lab. I have connected  P2 to port 2 of VNA and port 1 of VNA is connected  to the position of P1. Will I measure the same 0.323-j0.389?. From previous experience, I have noticed that the results vary depending on the position on which I have soldered the Port 1 of VNA. Could you please explain this little bit.

> {quote：title = Leyo写道：} {quote}>在这些情况下，我认为我不需要进行EM模拟......只需将其作为布局组件，并在原理图视图中进行模拟，并进行正确的终止。
使用原理图中的符号将在后台运行EM仿真。
> 1.在EDGE上P1的位置是否会对模拟结果产生影响？
我可以把P1放在EDGE上的任何一点，对吧。
如果P1位于多边形的边缘，则求解器将沿整个边缘放置一个端口。
因此，如果端口位于边缘，则在这种情况下位置没有区别。
> 2.地面附近有地平面，我没有在这里添加。
这架地平面会对结果产生很大影响吗？
这取决于您的电路和要求。
对于宽线，我预计效果不如窄线，但不要相信我。
最好的想法是模拟这两种情况，看看它是否会对你的情况产生影响。
> 3.我对端口的校准有点困惑。
让我们在实验室中进行真正的网络分析仪测量。
我已将P2连接到VNA的端口2，VNA的端口1连接到P1的位置。
我会测量相同的0.323-j0.389吗？
是的，如果您的VNA Feed与EM求解器端口相同。
Momentum端口校准假设您使用与端口宽度相同的线进行馈送。
因此，如果您在Momentum中的端口位于5mm宽线的边缘，则也可以对5mm宽的馈线进行校准。
现在，如果您将测量值与测量值进行比较，并将5mm线与一个小型同轴连接器连接起来并创建一个线宽，这与您模拟的不同。
想想当前，它从端口流入设备的位置。
Momentum将校准端口，以便电流在整个边缘宽度上流动，并具有此模式的正确电流分布。
这就是为什么我建议在硬件“端口”不在金属的整个边缘时考虑端口宽度。
>根据以往的经验，我注意到结果取决于我焊接VNA端口1的位置。
你能解释一下吗？
你能用“位置”来解释你的意思吗？
这可以通过多种方式理解，所以我想确保我们的意思相同。



     以下为原文

  > {quote:title=Leyo wrote:}{quote}
> In these situations, I think I need not do the EM simulation...just bring this as layout component and do the simulation in schematic view with correct terminations.

Using the symbol in the schematic will run the EM simulation in the background. 

> 1. Will the position of P1  on the EDGE make a  difference in the simulated results?. I  can place the P1 at any point on the EDGE, right.

If P1 is on the edge of a polygon, the solver will place a port along the complete edge. So the position does not make a difference in this case, if the port is on the edge.

> 2. I have ground plane near to the traces and I haven't added here. Will this ground plane make big difference in the results?

This depends on your circuit and requirement. For wide lines, I would expect less effect than for narrow lines, but don't trust me. The best idea is to simulate both cases, and see if it makes a difference for your case.

> 3. I am little bit confused about the calibration of the ports. Let us take the real Network Analyzer measurements in the lab. I have connected  P2 to port 2 of VNA and port 1 of VNA is connected  to the position of P1. Will I measure the same 0.323-j0.389?. 

Yes, if your VNA feed is the same as the EM solver port. The Momentum port calibration assumes that you feed with a line that has the same width as the port. So if you port in Momentum is on the edge of a 5mm wide line, calibration is done for a feedline that is 5mm wide also. Now if you compare to measurement, and you connect the 5mm line with a small coax connector and create a step in line width, that is different from what you have simulated. Think of the current, where does it flow from the port into the device. Momentum will calibrate the port so that the current flows over the entire edge width with the correct current distribution for this mode. That is why I recommend to think about port width when the hardware "port" is not on the entire edge of the metal.

> From previous experience, I have noticed that the results vary depending on the position on which I have soldered the Port 1 of VNA. Could you please explain this little bit.

Can you explain what you mean by "position"? This can be understood in many ways, so I want to make sure we mean the same thing.

> {quote：title = Leyo写道：} {quote}>根据您在上一个回复中的解释，此测量值与Momentum结果不匹配。
对，就是这样。
要模拟这种“点”连接，可以使用稍微远离边缘移动的端口，*在金属多边形内部。
这将模拟为“点”激发。
如果您在Momentum中查看3D当前可视化，您可以看到。
portinside.PNG122.7 KB



     以下为原文

  > {quote:title=Leyo wrote:}{quote}
>As per you explanation in the previous reply, this measurement will not match with Momentum results.

Yes, exactly.

To simulate such a "point" connection, you can use a port moved slightly away from the edge, *inside* the metal polygon. That will simulate as a "point" excitation. You can see that if you look at the 3D current visualization in Momentum.

附件

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• portinside.PNG122.7 KB