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CAN通信控制的位数据流处理器—Bit Stream Processor

2018-12-21 18:19:17  791 CAN CAN通信 数据流
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位数据流处理器负责完成程序中所有有关数据的操作。位数据流处理器实际上就是一个序列发生器,它控制发送缓冲器、接收 FIFO 和 CAN 总线之间的数据流,同时它也执行错误检测、仲裁、位填充和 CAN 总线错误处理功能。位数据流处理器程序结构如图 9-11 所示。
1.jpg
主要程序代码如下:





  1. //各个数据收发的起始状态
  2. //接收数据的 idle 状态
  3. always @ (posedge clk or posedge rst)
  4. begin
  5. if (rst)
  6. rx_idle <= 1'b0;
  7. else if (reset_mode | go_rx_id1 | error_frame)
  8. rx_idle <=#Tp 1'b0;
  9. else if (go_rx_idle)
  10. rx_idle <=#Tp 1'b1;
  11. end
  12. // 接收数据的 id1 状态
  13. always @ (posedge clk or posedge rst)
  14. begin
  15. if (rst)
  16. rx_id1 <= 1'b0;
  17. else if (reset_mode | go_rx_rtr1 | error_frame)
  18. rx_id1 <=#Tp 1'b0;
  19. else if (go_rx_id1)
  20. rx_id1 <=#Tp 1'b1;
  21. end
  22. //接收数据的 rtr1 状态
  23. always @ (posedge clk or posedge rst)
  24. begin
  25. if (rst)
  26. rx_rtr1 <= 1'b0;
  27. else if (reset_mode | go_rx_ide | error_frame)
  28. rx_rtr1 <=#Tp 1'b0;
  29. else if (go_rx_rtr1)
  30. rx_rtr1 <=#Tp 1'b1;
  31. end
  32. //接收数据的 ide 状态
  33. always @ (posedge clk or posedge rst)
  34. begin
  35. if (rst)
  36. rx_ide <= 1'b0;
  37. else if (reset_mode | go_rx_r0 | go_rx_id2 | error_frame)
  38. rx_ide <=#Tp 1'b0;
  39. else if (go_rx_ide)
  40. rx_ide <=#Tp 1'b1;
  41. end
  42. //接收数据的 id2 状态
  43. always @ (posedge clk or posedge rst)
  44. begin
  45. if (rst)
  46. rx_id2 <= 1'b0;
  47. else if (reset_mode | go_rx_rtr2 | error_frame)
  48. rx_id2 <=#Tp 1'b0;
  49. else if (go_rx_id2)
  50. rx_id2 <=#Tp 1'b1;
  51. end
  52. //接收数据的 rtr2 状态
  53. always @ (posedge clk or posedge rst)
  54. begin
  55. if (rst)
  56. rx_rtr2 <= 1'b0;
  57. else if (reset_mode | go_rx_r1 | error_frame)
  58. rx_rtr2 <=#Tp 1'b0;
  59. else if (go_rx_rtr2)
  60. rx_rtr2 <=#Tp 1'b1;
  61. end
  62. //接收数据的 r0 状态
  63. always @ (posedge clk or posedge rst)
  64. begin
  65. if (rst)
  66. rx_r1 <= 1'b0;
  67. else if (reset_mode | go_rx_r0 | error_frame)
  68. rx_r1 <=#Tp 1'b0;
  69. else if (go_rx_r1)
  70. rx_r1 <=#Tp 1'b1;
  71. end
  72. //接收数据的 r0 状态
  73. always @ (posedge clk or posedge rst)
  74. begin
  75. if (rst)
  76. rx_r0 <= 1'b0;
  77. else if (reset_mode | go_rx_dlc | error_frame)
  78. rx_r0 <=#Tp 1'b0;
  79. else if (go_rx_r0)
  80. rx_r0 <=#Tp 1'b1;
  81. end
  82. //接收数据的 dlc 状态
  83. always @ (posedge clk or posedge rst)
  84. begin
  85. if (rst)
  86. rx_dlc <= 1'b0;
  87. else if (reset_mode | go_rx_data | go_rx_crc | error_frame)
  88. rx_dlc <=#Tp 1'b0;
  89. else if (go_rx_dlc)
  90. rx_dlc <=#Tp 1'b1;
  91. end
  92. //接收数据状态
  93. always @ (posedge clk or posedge rst)
  94. begin
  95. if (rst)
  96. rx_data <= 1'b0;
  97. else if (reset_mode | go_rx_crc | error_frame)
  98. rx_data <=#Tp 1'b0;
  99. else if (go_rx_data)
  100. rx_data <=#Tp 1'b1;
  101. end
  102. // 接收数据的 crc 状态
  103. always @ (posedge clk or posedge rst)
  104. begin
  105. if (rst)
  106. rx_crc <= 1'b0;
  107. else if (reset_mode | go_rx_crc_lim | error_frame)
  108. rx_crc <=#Tp 1'b0;
  109. else if (go_rx_crc)
  110. rx_crc <=#Tp 1'b1;
  111. end
  112. //接收数据 crc 分隔符状态
  113. always @ (posedge clk or posedge rst)
  114. begin
  115. if (rst)
  116. rx_crc_lim <= 1'b0;
  117. else if (reset_mode | go_rx_ack | error_frame)
  118. rx_crc_lim <=#Tp 1'b0;
  119. else if (go_rx_crc_lim)
  120. rx_crc_lim <=#Tp 1'b1;
  121. end
  122. //接收数据的应答状态
  123. always @ (posedge clk or posedge rst)
  124. begin
  125. if (rst)
  126. rx_ack <= 1'b0;
  127. else if (reset_mode | go_rx_ack_lim | error_frame)
  128. rx_ack <=#Tp 1'b0;
  129. else if (go_rx_ack)
  130. rx_ack <=#Tp 1'b1;
  131. end
  132. //接收数据分隔符状态
  133. always @ (posedge clk or posedge rst)
  134. begin
  135. if (rst)
  136. rx_ack_lim <= 1'b0;
  137. else if (reset_mode | go_rx_eof | error_frame)
  138. rx_ack_lim <=#Tp 1'b0;
  139. else if (go_rx_ack_lim)
  140. rx_ack_lim <=#Tp 1'b1;
  141. end
  142. //接收数据的帧尾状态
  143. always @ (posedge clk or posedge rst)
  144. begin
  145. if (rst)
  146. rx_eof <= 1'b0;
  147. else if (go_rx_inter | error_frame | go_overload_frame)
  148. rx_eof <=#Tp 1'b0;
  149. else if (go_rx_eof)
  150. rx_eof <=#Tp 1'b1;
  151. end
  152. //帧间空间状态
  153. always @ (posedge clk or posedge rst)
  154. begin
  155. if (rst)
  156. rx_inter <= 1'b0;
  157. else if (reset_mode | go_rx_idle | go_rx_id1 | go_overload_frame | go_error_frame)
  158. rx_inter <=#Tp 1'b0;
  159. else if (go_rx_inter)
  160. rx_inter <=#Tp 1'b1;
  161. end
  162. // ID 寄存器
  163. always @ (posedge clk or posedge rst)
  164. begin
  165. if (rst)
  166. id <= 0;
  167. else if (sample_point & (rx_id1 | rx_id2) & (~bit_de_stuff))
  168. id <=#Tp {id[27:0], sampLED_bit};
  169. end
  170. // rtr1 位
  171. always @ (posedge clk or posedge rst)
  172. begin
  173. if (rst)
  174. rtr1 <= 0;
  175. else if (sample_point & rx_rtr1 & (~bit_de_stuff))
  176. rtr1 <=#Tp sampled_bit;
  177. end
  178. // rtr2 位
  179. always @ (posedge clk or posedge rst)
  180. begin
  181. if (rst)
  182. rtr2 <= 0;
  183. else if (sample_point & rx_rtr2 & (~bit_de_stuff))
  184. rtr2 <=#Tp sampled_bit;
  185. end
  186. // ide 位
  187. always @ (posedge clk or posedge rst)
  188. begin
  189. if (rst)
  190. ide <= 0;
  191. else if (sample_point & rx_ide & (~bit_de_stuff))
  192. ide <=#Tp sampled_bit;
  193. end
  194. // 获得数据长度
  195. always @ (posedge clk or posedge rst)
  196. begin
  197. if (rst)
  198. data_len <= 0;
  199. else if (sample_point & rx_dlc & (~bit_de_stuff))
  200. data_len <=#Tp {data_len[2:0], sampled_bit};
  201. end
  202. // 获得数据
  203. always @ (posedge clk or posedge rst)
  204. begin
  205. if (rst)
  206. tmp_data <= 0;
  207. else if (sample_point & rx_data & (~bit_de_stuff))
  208. tmp_data <=#Tp {tmp_data[6:0], sampled_bit};
  209. end
  210. always @ (posedge clk or posedge rst)
  211. begin
  212. if (rst)
  213. write_data_to_tmp_fifo <= 0;
  214. else if (sample_point & rx_data & (~bit_de_stuff) & (&bit_cnt[2:0]))
  215. write_data_to_tmp_fifo <=#Tp 1'b1;
  216. else
  217. write_data_to_tmp_fifo <=#Tp 0;
  218. end
  219. always @ (posedge clk or posedge rst)
  220. begin
  221. if (rst)
  222. byte_cnt <= 0;
  223. else if (write_data_to_tmp_fifo)
  224. byte_cnt <=#Tp byte_cnt + 1;
  225. else if (reset_mode | (sample_point & go_rx_crc_lim))
  226. byte_cnt <=#Tp 0;
  227. end
  228. always @ (posedge clk)
  229. begin
  230. if (write_data_to_tmp_fifo)
  231. tmp_fifo[byte_cnt] <=#Tp tmp_data;
  232. end
  233. // CRC 校验数据
  234. always @ (posedge clk or posedge rst)
  235. begin
  236. if (rst)
  237. crc_in <= 0;
  238. else if (sample_point & rx_crc & (~bit_de_stuff))
  239. crc_in <=#Tp {crc_in[13:0], sampled_bit};
  240. end
  241. //计数器
  242. always @ (posedge clk or posedge rst)
  243. begin
  244. if (rst)
  245. bit_cnt <= 0;
  246. else if (go_rx_id1 | go_rx_id2 | go_rx_dlc | go_rx_data | go_rx_crc |
  247. go_rx_ack | go_rx_eof | go_rx_inter | go_error_frame | go_overload_frame)
  248. bit_cnt <=#Tp 0;
  249. else if (sample_point & (~bit_de_stuff))
  250. bit_cnt <=#Tp bit_cnt + 1'b1;
  251. end
  252. //帧尾计数
  253. always @ (posedge clk or posedge rst)
  254. begin
  255. if (rst)
  256. eof_cnt <= 0;
  257. else if (sample_point)
  258. begin
  259. if (reset_mode | go_rx_inter | go_error_frame | go_overload_frame)
  260. eof_cnt <=#Tp 0;
  261. else if (rx_eof)
  262. eof_cnt <=#Tp eof_cnt + 1'b1;
  263. end
  264. end
  265. // 使能位填充
  266. always @ (posedge clk or posedge rst)
  267. begin
  268. if (rst)
  269. bit_stuff_cnt_en <= 1'b0;
  270. else if (bit_de_stuff_set)
  271. bit_stuff_cnt_en <=#Tp 1'b1;
  272. else if (bit_de_stuff_reset)
  273. bit_stuff_cnt_en <=#Tp 1'b0;
  274. end
  275. //位填充计数器
  276. always @ (posedge clk or posedge rst)
  277. begin
  278. if (rst)
  279. bit_stuff_cnt <= 1;
  280. else if (bit_de_stuff_reset)
  281. bit_stuff_cnt <=#Tp 1;
  282. else if (sample_point & bit_stuff_cnt_en)
  283. begin
  284. if (bit_stuff_cnt == 5)
  285. bit_stuff_cnt <=#Tp 1;
  286. else if (sampled_bit == sampled_bit_q)
  287. bit_stuff_cnt <=#Tp bit_stuff_cnt + 1'b1;
  288. else
  289. bit_stuff_cnt <=#Tp 1;
  290. end
  291. end
  292. // 发送数据的使能位填充
  293. always @ (posedge clk or posedge rst)
  294. begin
  295. if (rst)
  296. bit_stuff_cnt_tx_en <= 1'b0;
  297. else if (bit_de_stuff_set & transmitting)
  298. bit_stuff_cnt_tx_en <=#Tp 1'b1;
  299. else if (bit_de_stuff_reset)
  300. bit_stuff_cnt_tx_en <=#Tp 1'b0;
  301. end
  302. //发送数据的位填充计数
  303. always @ (posedge clk or posedge rst)
  304. begin
  305. if (rst)
  306. bit_stuff_cnt_tx <= 1;
  307. else if (bit_de_stuff_reset)
  308. bit_stuff_cnt_tx <=#Tp 1;
  309. else if (tx_point_q & bit_stuff_cnt_en)
  310. begin
  311. if (bit_stuff_cnt_tx == 5)
  312. bit_stuff_cnt_tx <=#Tp 1;
  313. else if (tx == tx_q)
  314. bit_stuff_cnt_tx <=#Tp bit_stuff_cnt_tx + 1'b1;
  315. else
  316. bit_stuff_cnt_tx <=#Tp 1;
  317. end
  318. end
  319. assign bit_de_stuff = bit_stuff_cnt == 5;
  320. assign bit_de_stuff_tx = bit_stuff_cnt_tx == 5;
  321. //位填充错误
  322. assign stuff_err = sample_point & bit_stuff_cnt_en & bit_de_stuff & (sampled_bit ==
  323. sampled_bit_q);
  324. //产生延迟信号
  325. always @ (posedge clk)
  326. begin
  327. reset_mode_q <=#Tp reset_mode;
  328. node_bus_off_q <=#Tp node_bus_off;
  329. end
  330. always @ (posedge clk or posedge rst)
  331. begin
  332. if (rst)
  333. crc_enable <= 1'b0;
  334. else if (go_crc_enable)
  335. crc_enable <=#Tp 1'b1;
  336. else if (reset_mode | rst_crc_enable)
  337. crc_enable <=#Tp 1'b0;
  338. end
  339. //CRC 校验错误
  340. always @ (posedge clk or posedge rst)
  341. begin
  342. if (rst)
  343. crc_err <= 1'b0;
  344. else if (go_rx_ack)
  345. crc_err <=#Tp crc_in != calculated_crc;
  346. else if (reset_mode | error_frame_ended)
  347. crc_err <=#Tp 1'b0;
  348. end
  349. // 一般错误的条件
  350. assign form_err = sample_point & ( ((~bit_de_stuff) & rx_ide & sampled_bit & (~rtr1)) |
  351. (rx_crc_lim & (~sampled_bit)) | (rx_ack_lim & (~sampled_bit)) | ((eof_cnt < 6) & rx_eof &
  352. (~sampled_bit) & (~tx_state) ) | (& rx_eof & (~sampled_bit) & tx_state));
  353. always @ (posedge clk or posedge rst)
  354. begin
  355. if (rst)
  356. ack_err_latched <= 1'b0;
  357. else if (reset_mode | error_frame_ended | go_overload_frame)
  358. ack_err_latched <=#Tp 1'b0;
  359. else if (ack_err)
  360. ack_err_latched <=#Tp 1'b1;
  361. end
  362. always @ (posedge clk or posedge rst)
  363. begin
  364. if (rst)
  365. bit_err_latched <= 1'b0;
  366. else if (reset_mode | error_frame_ended | go_overload_frame)
  367. bit_err_latched <=#Tp 1'b0;
  368. else if (bit_err)
  369. bit_err_latched <=#Tp 1'b1;
  370. end
  371. //规则 5
  372. assign rule5 = (~node_error_passive) & bit_err & (error_frame & (error_cnt1 < 7) |
  373. overload_frame & (overload_cnt1 < 7) );
  374. //规则 3
  375. always @ (posedge clk or posedge rst)
  376. begin
  377. if (rst)
  378. rule3_exc1_1 <= 1'b0;
  379. else if (reset_mode | error_flag_over | rule3_exc1_2)
  380. rule3_exc1_1 <=#Tp 1'b0;
  381. else if (transmitter & node_error_passive & ack_err)
  382. rule3_exc1_1 <=#Tp 1'b1;
  383. end
  384. always @ (posedge clk or posedge rst)
  385. begin
  386. if (rst)
  387. rule3_exc1_2 <= 1'b0;
  388. else if (reset_mode | error_flag_over)
  389. rule3_exc1_2 <=#Tp 1'b0;
  390. else if (rule3_exc1_1)
  391. rule3_exc1_2 <=#Tp 1'b1;
  392. else if ((error_cnt1 < 7) & sample_point & (~sampled_bit))
  393. rule3_exc1_2 <=#Tp 1'b0;
  394. end
  395. always @ (posedge clk or posedge rst)
  396. begin
  397. if (rst)
  398. rule3_exc2 <= 1'b0;
  399. else if (reset_mode | error_flag_over)
  400. rule3_exc2 <=#Tp 1'b0;
  401. else if (transmitter & stuff_err & arbitration_field & sample_point & tx & (~sampled_bit))
  402. rule3_exc2 <=#Tp 1'b1;
  403. end
  404. always @ (posedge clk or posedge rst)
  405. begin
  406. if (rst)
  407. stuff_err_latched <= 1'b0;
  408. else if (reset_mode | error_frame_ended | go_overload_frame)
  409. stuff_err_latched <=#Tp 1'b0;
  410. else if (stuff_err)
  411. stuff_err_latched <=#Tp 1'b1;
  412. end
  413. always @ (posedge clk or posedge rst)
  414. begin
  415. if (rst)
  416. form_err_latched <= 1'b0;
  417. else if (reset_mode | error_frame_ended | go_overload_frame)
  418. form_err_latched <=#Tp 1'b0;
  419. else if (form_err)
  420. form_err_latched <=#Tp 1'b1;
  421. end
  422. //接收数据的 CRC 校验
  423. can_crc i_can_crc_rx
  424. (
  425. .clk(clk),
  426. .data(sampled_bit),
  427. .enable(crc_enable & sample_point & (~bit_de_stuff)),
  428. .initialize(go_crc_enable),
  429. .crc(calculated_crc)
  430. );
  431. assign no_byte0 = rtr1 | (data_len<1);
  432. assign no_byte1 = rtr1 | (data_len<2);
  433. // 接收数据 FIFO 的写使能
  434. always @ (posedge clk or posedge rst)
  435. begin
  436. if (rst)
  437. wr_fifo <= 1'b0;
  438. else if (reset_wr_fifo)
  439. wr_fifo <=#Tp 1'b0;
  440. else if (go_rx_inter & id_ok & (~error_frame_ended) & ((~tx_state) | self_rx_request))
  441. wr_fifo <=#Tp 1'b1;
  442. end
  443. always @ (posedge clk or posedge rst)
  444. begin
  445. if (rst)
  446. header_cnt <= 0;
  447. else if (reset_wr_fifo)
  448. header_cnt <=#Tp 0;
  449. else if (wr_fifo & storing_header)
  450. header_cnt <=#Tp header_cnt + 1;
  451. end
  452. //数据计数器
  453. always @ (posedge clk or posedge rst)
  454. begin
  455. if (rst)
  456. data_cnt <= 0;
  457. else if (reset_wr_fifo)
  458. data_cnt <=#Tp 0;
  459. else if (wr_fifo)
  460. data_cnt <=#Tp data_cnt + 1;
  461. end
  462. // 数据的合成并保存到 FIFO 中
  463. always @ (extended_mode or ide or data_cnt or header_cnt or header_len or
  464. storing_header or id or rtr1 or rtr2 or data_len or
  465. tmp_fifo[0] or tmp_fifo[2] or tmp_fifo[4] or tmp_fifo[6] or
  466. tmp_fifo[1] or tmp_fifo[3] or tmp_fifo[5] or tmp_fifo[7])
  467. begin
  468. if (storing_header)
  469. begin
  470. if (extended_mode) // extended mode
  471. begin
  472. if (ide) // extended format
  473. begin
  474. case (header_cnt) // synthesis parallel_case
  475. 3'h0 : data_for_fifo <= {1'b1, rtr2, 2'h0, data_len};
  476. 3'h1 : data_for_fifo <= id[28:21];
  477. 3'h2 : data_for_fifo <= id[20:13];
  478. 3'h3 : data_for_fifo <= id[12:5];
  479. 3'h4 : data_for_fifo <= {id[4:0], 3'h0};
  480. default: data_for_fifo <= 0;
  481. endcase
  482. end
  483. else // standard format
  484. begin
  485. case (header_cnt) // synthesis parallel_case
  486. 3'h0 : data_for_fifo <= {1'b0, rtr1, 2'h0, data_len};
  487. 3'h1 : data_for_fifo <= id[10:3];
  488. 3'h2 : data_for_fifo <= {id[2:0], 5'h0};
  489. default: data_for_fifo <= 0;
  490. endcase
  491. end
  492. end
  493. else // normal mode
  494. begin
  495. case (header_cnt) // synthesis parallel_case
  496. 3'h0 : data_for_fifo <= id[10:3];
  497. 3'h1 : data_for_fifo <= {id[2:0], rtr1, data_len};
  498. default: data_for_fifo <= 0;
  499. endcase
  500. end
  501. end
  502. else
  503. data_for_fifo <= tmp_fifo[data_cnt-header_len];
  504. end
  505. // 传输错误帧
  506. always @ (posedge clk or posedge rst)
  507. begin
  508. if (rst)
  509. error_frame <= 1'b0;
  510. else if (reset_mode | error_frame_ended | go_overload_frame)
  511. error_frame <=#Tp 1'b0;
  512. else if (go_error_frame)
  513. error_frame <=#Tp 1'b1;
  514. end
  515. always @ (posedge clk)
  516. begin
  517. if (sample_point)
  518. error_frame_q <=#Tp error_frame;
  519. end
  520. always @ (posedge clk or posedge rst)
  521. begin
  522. if (rst)
  523. error_cnt1 <= 1'b0;
  524. else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
  525. error_cnt1 <=#Tp 1'b0;
  526. else if (error_frame & tx_point & (error_cnt1 < 7))
  527. error_cnt1 <=#Tp error_cnt1 + 1'b1;
  528. end
  529. assign error_flag_over = ((~node_error_passive) & sample_point & (error_cnt1 == 7) |
  530. node_error_passive & sample_point & (passive_cnt == 5)) & (~enable_error_cnt2);
  531. always @ (posedge clk or posedge rst)
  532. begin
  533. if (rst)
  534. error_flag_over_blocked <= 1'b0;
  535. else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
  536. error_flag_over_blocked <=#Tp 1'b0;
  537. else if (error_flag_over)
  538. error_flag_over_blocked <=#Tp 1'b1;
  539. end
  540. always @ (posedge clk or posedge rst)
  541. begin
  542. if (rst)
  543. enable_error_cnt2 <= 1'b0;
  544. else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
  545. enable_error_cnt2 <=#Tp 1'b0;
  546. else if (error_frame & (error_flag_over & sampled_bit))
  547. enable_error_cnt2 <=#Tp 1'b1;
  548. end
  549. always @ (posedge clk or posedge rst)
  550. begin
  551. if (rst)
  552. error_cnt2 <= 0;
  553. else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
  554. error_cnt2 <=#Tp 0;
  555. else if (enable_error_cnt2 & tx_point)
  556. error_cnt2 <=#Tp error_cnt2 + 1'b1;
  557. end
  558. always @ (posedge clk or posedge rst)
  559. begin
  560. if (rst)
  561. delayed_dominant_cnt <= 0;
  562. else if (reset_mode | enable_error_cnt2 | go_error_frame | enable_overload_cnt2 |
  563. go_overload_frame)
  564. delayed_dominant_cnt <=#Tp 0;
  565. else if (sample_point & (~sampled_bit) & ((error_cnt1 == 7) | (overload_cnt1 == 7)))
  566. delayed_dominant_cnt <=#Tp delayed_dominant_cnt + 1'b1;
  567. end
  568. //被动计数
  569. always @ (posedge clk or posedge rst)
  570. begin
  571. if (rst)
  572. passive_cnt <= 0;
  573. else if (reset_mode | error_frame_ended | go_error_frame | go_overload_frame)
  574. passive_cnt <=#Tp 0;
  575. else if (sample_point & (passive_cnt < 5))
  576. begin
  577. if (error_frame_q & (~enable_error_cnt2) & (sampled_bit == sampled_bit_q))
  578. passive_cnt <=#Tp passive_cnt + 1'b1;
  579. else
  580. passive_cnt <=#Tp 0;
  581. end
  582. end
  583. // 传输超载帧
  584. always @ (posedge clk or posedge rst)
  585. begin
  586. if (rst)
  587. overload_frame <= 1'b0;
  588. else if (reset_mode | overload_frame_ended | go_error_frame)
  589. overload_frame <=#Tp 1'b0;
  590. else if (go_overload_frame)
  591. overload_frame <=#Tp 1'b1;
  592. end
  593. always @ (posedge clk or posedge rst)
  594. begin
  595. if (rst)
  596. overload_cnt1 <= 1'b0;
  597. else if (reset_mode | overload_frame_ended | go_error_frame | go_overload_frame)
  598. overload_cnt1 <=#Tp 1'b0;
  599. else if (overload_frame & tx_point & (overload_cnt1 < 7))
  600. overload_cnt1 <=#Tp overload_cnt1 + 1'b1;
  601. end
  602. assign overload_flag_over = sample_point & (overload_cnt1 == 7) & (~enable_overload_cnt2);
  603. always @ (posedge clk or posedge rst)
  604. begin
  605. if (rst)
  606. enable_overload_cnt2 <= 1'b0;
  607. else if (reset_mode | overload_frame_ended | go_error_frame | go_overload_frame)
  608. enable_overload_cnt2 <=#Tp 1'b0;
  609. else if (overload_frame & (overload_flag_over & sampled_bit))
  610. enable_overload_cnt2 <=#Tp 1'b1;
  611. end
  612. always @ (posedge clk or posedge rst)
  613. begin
  614. if (rst)
  615. overload_cnt2 <= 0;
  616. else if (reset_mode | overload_frame_ended | go_error_frame | go_overload_frame)
  617. overload_cnt2 <=#Tp 0;
  618. else if (enable_overload_cnt2 & tx_point)
  619. overload_cnt2 <=#Tp overload_cnt2 + 1'b1;
  620. end
  621. always @ (posedge clk or posedge rst)
  622. begin
  623. if (rst)
  624. overload_frame_blocked <= 0;
  625. else if (reset_mode | go_error_frame | go_rx_id1)
  626. overload_frame_blocked <=#Tp 0;
  627. else if (go_overload_frame & overload_frame) // This is a second sequential
  628. overload
  629. overload_frame_blocked <=#Tp 1'b1;
  630. end
  631. assign send_ack = (~tx_state) & rx_ack & (~err) & (~listen_only_mode);
  632. always @ (posedge clk or posedge rst)
  633. begin
  634. if (rst)
  635. tx <= 1'b1;
  636. else if (reset_mode) // Reset
  637. tx <=#Tp 1'b1;
  638. else if (tx_point)
  639. begin
  640. if (tx_state) // 传输报文
  641. tx <=#Tp ((~bit_de_stuff_tx) & tx_bit) | (bit_de_stuff_tx & (~tx_q));
  642. else if (send_ack) // 应答
  643. tx <=#Tp 1'b0;
  644. else if (overload_frame) //传输超载帧
  645. begin
  646. if (overload_cnt1 < 6)
  647. tx <=#Tp 1'b0;
  648. else
  649. tx <=#Tp 1'b1;
  650. end
  651. else if (error_frame) // 传输错误帧
  652. begin
  653. if (error_cnt1 < 6)
  654. begin
  655. if (node_error_passive)
  656. tx <=#Tp 1'b1;
  657. else
  658. tx <=#Tp 1'b0;
  659. end
  660. else
  661. tx <=#Tp 1'b1;
  662. end
  663. else
  664. tx <=#Tp 1'b1;
  665. end
  666. end
  667. always @ (posedge clk)
  668. begin
  669. if (tx_point)
  670. tx_q <=#Tp tx & (~go_early_tx_latched);
  671. end
  672. //延迟发送数据
  673. always @ (posedge clk)
  674. begin
  675. tx_point_q <=#Tp tx_point;
  676. end

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