自发RESET IOPUWR位怎么设置

下午好，我正在努力寻找意外重置的源头。我基本上已经注释了所有的代码，除了下面的ISR片段（它被称为一次由外部脉冲）和一个空的主while循环。然而，像钟表运行后约5分钟，DSSPICEV复位。如果我检查RCON寄存器，我看到比特14被设置。FRM将此标志描述为“非法的OP代码”。我执行的代码太少，在任何地方都看不到非法的OP代码或内存访问。下面是代码段，任何帮助都将被极大地理解。也许相关的，“错误”状态“在访问程序内存地址0x1001到0x200期间可能会发生一个意外的地址错误陷阱。当使用TBRRDX、TBLWTX或基于PSV的指令读取或写入程序存储器地址时，已经观察到了一个或多个中断请求。“我如何指导编译器不使用这些地址？”SnpIs:AuthQuixAtditTyx（（α-BythTytha，NoAutoPosipSv））.CNSIFT＝0，IF（PurbButs.RB15＝＝1）{Switt（StffStStand）{CaseunIti:IF（U16SySt=＝60）{TMR4＝0；TMR5＝0；SuffFSMSTATE＝就绪；Debug 2^＝1；} {U16SySt+++；}中断；CaseRead：Dead；Deb Deb；UG：中断；}调试3^＝1；}



      以下为原文

    Good afternoon, I'm struggling to find the source of an unexpected RESET.  I have commented essentially all of my code out except the ISR snippet (which is called once a second by an external pulse) below and an empty main while loop.  However like clockwork after running for about 5 minutes the dsPIC33EV resets.  If I inspect the RCON register I see that bit 14 is set.  the FRM describes this flag as occurring for "illegal op code".  I have so little code executing that I can't see anywhere an illegal op code, or memory access would occur.  Below is the snippet, any help would be greatly appreciated.

Maybe relevant, the errata states "An unexpected address error trap may occur during accesses to program memory addresses, 0x001 through 0x200. This has been observed when one or more interrupt requests are asserted while reading or writing program memory addresses using TBLRDx, TBLWTx or PSV-based instructions."

How do I direct the compiler not to use these addresses?

snippet:
void __attribute__ ((__interrupt__, no_auto_psv)) _CNInterrupt(void){
    IFS1bits.CNIF=0;
    if (PORTBbits.RB15==1){
    switch (systemFSMState){
        case uninit:
            if (u16SysTick==60){
                TMR4=0;
                TMR5=0;
                u16SysTick=0;
                systemFSMState=ready;
                DEBUG2^=1;
            }
            else{
                u16SysTick++;
            }
            break;
        case ready:
            break;
        case debug:
            break;
        }
     
    DEBUG3^=1;
    }
}