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所以，我开始把我的脚趾放在微控制器的世界里，并决定从一个由大克莱夫发布的项目开始。这个项目是一个冰柱轻，他把HEX文件放在他的网站上，我把它加载到使用中（不准备进入编码，我只是从硬件的开始，然后我的方式进入编码）。所以我填好了他的指令来建造这个东西，然后用我的新皮卡3把代码上传到PIC上。我翻来覆去地想，我不知怎么地订购了PIC12F633，这个项目的代码是PIC12F629。在那些代码不能工作的芯片上有足够的差异吗？如果是这样，有什么我可以从一个十六进制文件来让它工作吗？或者我应该咬紧牙关购买12F629？谢谢你的帮助！
以上来自于百度翻译 以下为原文 So, I'm starting to dip my toes in the world of microcontrollers, and decided to start with a project posted by Big Clive. The project is an icicle light, and he posted the hex file on his website, which I doenloaded to use (not ready to get into coding, I'm just going to start with the hardware end of things and then work my way into coding). So i fillowed his instructions to build the thing, then uploaded the code onto the PIC using my new Pickit 3. Power it up - aaaand, only the first LED lights up. I rummage around and figure out that I somehow ordered PIC12F683, and the project's code is for a PIC12F629. Is there a sufficient difference in those chips that the code wouldn't work? If so, is there anything I can do from a HEX file to make it work? Or should I just bite the bullet and purchase the 12F629s? Thanks for any help! 
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14个回答
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我问克莱夫我是否可以得到源代码的副本。
以上来自于百度翻译 以下为原文 I've asked Clive if I can get a copy of the source code. |
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683有ADC，629没有。因此，四ANO与AN0 AN3被设置为模拟和数字输入读取0。如果通过读取端口引脚和反转来切换LED，它们将永远不会改变。还有许多其他细微差别，但其中一个很突出。难道你不能得到源并只添加安塞尔初始化吗？
以上来自于百度翻译 以下为原文 683 has ADC, 629 doesn't. Thus the four IO with AN0-AN3 are set to analog and digital inputs read 0. If LEDs are toggled by reading the port pin and inverting, they will never change. There are a number of other subtle differences, but that one stands out. Can't you get the source and just add ANSEL initialization? |
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如果这个项目不是太复杂，也许你可以试一试。试着写代码。这可能是一个很好的学习经验。
以上来自于百度翻译 以下为原文 If the project is not too complex, maybe you can give it a try. Try to write the code. It could be a good learning experience. |
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该项目涉及三态复用和多种照明模式。绝对超出我的肯代码。
以上来自于百度翻译 以下为原文 The project involves tri-state multiplexing and multiple illumination modes. Definitely beyond my ken to code at the moment. |
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更新：我拆解了代码。一看，我猜我需要改变包含和处理器设置，并用那个配置位做些什么？
以上来自于百度翻译 以下为原文 Update: I disassembled the code. Just at a glance, I'm guessing I need to change the include and processor setting, and do something with that config bit? ; original File = C:UsersrolleDesktopMeteorLighticicle.HEX processor 12F629 #include __config 0x3F8C ; _CPD_OFF & _CP_OFF & _BODEN_OFF & _MCLRE_OFF & _PWRTE_ON & _WDT_ON ; & _INTRC_OSC_NOCLKOUT ; RAM-Variable LRAM_0x20 equ 0x20 LRAM_0x21 equ 0x21 LRAM_0x23 equ 0x23 LRAM_0x24 equ 0x24 LRAM_0x25 equ 0x25 LRAM_0x26 equ 0x26 LRAM_0x27 equ 0x27 LRAM_0x28 equ 0x28 LRAM_0x29 equ 0x29 LRAM_0x2A equ 0x2A LRAM_0x2B equ 0x2B LRAM_0x2D equ 0x2D LRAM_0x2F equ 0x2F LRAM_0x30 equ 0x30 LRAM_0x31 equ 0x31 LRAM_0x32 equ 0x32 LRAM_0x33 equ 0x33 LRAM_0x35 equ 0x35 LRAM_0x36 equ 0x36 LRAM_0x37 equ 0x37 ; Program Org 0x0000 ; Reset-Vector NOP NOP NOP NOP ; Interrupt-Vector CLRF GPIO ; !!Bank!! GPIO - TRISIO MOVLW 0x07 ; b'00000111' d'007' MOVWF CMCON ; !!Bank!! CMCON - VRCON BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0x00 ; b'00000000' d'000' MOVWF INTCON MOVLW 0x3F ; b'00111111' d'063' "?" MOVWF GPIO ; !!Bank!! GPIO - TRISIO MOVLW 0x7F ; b'01111111' d'127' "" MOVWF TMR0 ; !!Bank!! TMR0 - OPTION_REG MOVLW 0x10 ; b'00010000' d'016' MOVWF WPU ; !!Bank!! Unimplemented - WPU MOVLW 0xFF ; b'11111111' d'255' MOVWF T1CON ; !!Bank!! T1CON - OSCCAL BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select CLRF EEADR ; !!Bank!! Unimplemented - EEADR BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select CALL LADR_0x0208 MOVWF LRAM_0x31 CALL LADR_0x0208 MOVWF LRAM_0x28 CALL LADR_0x0208 MOVWF LRAM_0x29 CALL LADR_0x0208 MOVWF LRAM_0x2A BTFSS LRAM_0x31,7 GOTO LADR_0x0028 CLRF LRAM_0x31 MOVLW 0x74 ; b'01110100' d'116' "t" MOVWF LRAM_0x28 MOVLW 0xE3 ; b'11100011' d'227' MOVWF LRAM_0x29 MOVLW 0x63 ; b'01100011' d'099' "c" MOVWF LRAM_0x2A LADR_0x0028 CLRWDT MOVF LRAM_0x29,W ANDLW 0x0F ; b'00001111' d'015' MOVWF LRAM_0x32 CALL LADR_0x023A LADR_0x002D CLRWDT CLRF LRAM_0x2D MOVLW 0x0F ; b'00001111' d'015' ANDWF LRAM_0x31,F CLRF LRAM_0x2B MOVF LRAM_0x31,W ADDWF PCL,F ; !!Program-Counter-Modification GOTO LADR_0x020E GOTO LADR_0x020F GOTO LADR_0x0210 GOTO LADR_0x0212 GOTO LADR_0x0213 GOTO LADR_0x0214 GOTO LADR_0x0216 GOTO LADR_0x0218 GOTO LADR_0x021A GOTO LADR_0x021B GOTO LADR_0x021C GOTO LADR_0x021D GOTO LADR_0x021E GOTO LADR_0x021F CLRF LRAM_0x31 CLRF LRAM_0x31 GOTO LADR_0x002D LADR_0x0045 CALL LADR_0x00A4 MOVF LRAM_0x29,W ANDLW 0x0F ; b'00001111' d'015' SUBWF LRAM_0x2D,F BTFSC STATUS,Z GOTO LADR_0x0045 MOVWF LRAM_0x2D ADDWF PCL,F ; !!Program-Counter-Modification GOTO LADR_0x005D GOTO LADR_0x005F GOTO LADR_0x0061 GOTO LADR_0x0063 GOTO LADR_0x0065 GOTO LADR_0x0067 GOTO LADR_0x0069 GOTO LADR_0x006B GOTO LADR_0x006D GOTO LADR_0x006F GOTO LADR_0x0071 GOTO LADR_0x0073 GOTO LADR_0x0045 GOTO LADR_0x0045 GOTO LADR_0x0045 GOTO LADR_0x0045 LADR_0x005D CALL LADR_0x0135 GOTO LADR_0x0074 LADR_0x005F CALL LADR_0x013D GOTO LADR_0x0074 LADR_0x0061 CALL LADR_0x0145 GOTO LADR_0x0074 LADR_0x0063 CALL LADR_0x014D GOTO LADR_0x0074 LADR_0x0065 CALL LADR_0x0155 GOTO LADR_0x0074 LADR_0x0067 CALL LADR_0x015D GOTO LADR_0x0074 LADR_0x0069 CALL LADR_0x0165 GOTO LADR_0x0074 LADR_0x006B CALL LADR_0x016D GOTO LADR_0x0074 LADR_0x006D CALL LADR_0x0175 GOTO LADR_0x0074 LADR_0x006F CALL LADR_0x017D GOTO LADR_0x0074 LADR_0x0071 CALL LADR_0x0185 GOTO LADR_0x0074 LADR_0x0073 CALL LADR_0x018D LADR_0x0074 CALL LADR_0x019A BTFSC LRAM_0x2B,0 CALL LADR_0x0195 CALL LADR_0x019A GOTO LADR_0x0045 LADR_0x0079 RRF LRAM_0x26,F RRF LRAM_0x27,F BCF LRAM_0x26,7 BTFSS LRAM_0x2F,1 BSF LRAM_0x26,7 CALL LADR_0x00F3 INCF LRAM_0x2F,F GOTO LADR_0x0079 LADR_0x0081 RRF LRAM_0x26,F RRF LRAM_0x27,F BCF LRAM_0x26,7 BTFSS LRAM_0x2F,2 BSF LRAM_0x26,7 CALL LADR_0x00F3 INCF LRAM_0x2F,F GOTO LADR_0x0081 LADR_0x0089 RRF LRAM_0x26,F RRF LRAM_0x27,F BCF LRAM_0x26,7 BTFSS LRAM_0x2F,4 BSF LRAM_0x26,7 CALL LADR_0x00F3 INCF LRAM_0x2F,F GOTO LADR_0x0089 LADR_0x0091 RRF LRAM_0x26,F RRF LRAM_0x27,F BCF LRAM_0x26,7 BTFSS LRAM_0x2F,5 BSF LRAM_0x26,7 CALL LADR_0x00F3 INCF LRAM_0x2F,F GOTO LADR_0x0091 LADR_0x0099 CALL LADR_0x00A4 MOVF LRAM_0x29,W MOVWF LRAM_0x26 MOVF LRAM_0x2A,W MOVWF LRAM_0x27 CALL LADR_0x00F3 CALL LADR_0x00F3 CALL LADR_0x00F3 CALL LADR_0x00F3 CALL LADR_0x00F3 GOTO LADR_0x0099 LADR_0x00A4 MOVLW 0x0C ; b'00001100' d'012' MOVLW 0x33 ; b'00110011' d'051' "3" LADR_0x00A6 CALL LADR_0x01C4 DECFSZ LRAM_0x33,F GOTO LADR_0x00A6 RETURN LADR_0x00AA CALL LADR_0x01C4 MOVF LRAM_0x29,W MOVWF LRAM_0x26 MOVF LRAM_0x28,W MOVWF LRAM_0x27 CALL LADR_0x00F3 GOTO LADR_0x00AA LADR_0x00B1 CLRF LRAM_0x37 INCF LRAM_0x37,F BTFSS LRAM_0x2B,5 GOTO LADR_0x00B9 CALL LADR_0x01C4 MOVF LRAM_0x29,W ANDLW 0x03 ; b'00000011' d'003' ADDWF LRAM_0x37,F LADR_0x00B9 CALL LADR_0x0135 CALL LADR_0x019A BTFSS LRAM_0x2B,1 GOTO LADR_0x00BE CALL LADR_0x01B8 LADR_0x00BE CALL LADR_0x013D CALL LADR_0x019A CALL LADR_0x0145 CALL LADR_0x019A CALL LADR_0x014D CALL LADR_0x019A CALL LADR_0x0155 CALL LADR_0x019A CALL LADR_0x015D CALL LADR_0x019A CALL LADR_0x0165 CALL LADR_0x019A CALL LADR_0x016D CALL LADR_0x019A CALL LADR_0x0175 CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A CALL LADR_0x0185 CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A BTFSS LRAM_0x2B,2 GOTO LADR_0x00D7 CALL LADR_0x01B8 LADR_0x00D7 CALL LADR_0x0195 CALL LADR_0x019A BTFSS LRAM_0x2B,3 GOTO LADR_0x00EE CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x0195 CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x0195 CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x0195 CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x0195 CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x0195 LADR_0x00EE NOP DECFSZ LRAM_0x37,F GOTO LADR_0x00B9 CALL LADR_0x01AE GOTO LADR_0x00B1 LADR_0x00F3 MOVLW 0x3C ; b'00111100' d'060' "<" MOVWF LRAM_0x25 LADR_0x00F5 BTFSC LRAM_0x26,7 CALL LADR_0x0135 BTFSS LRAM_0x26,7 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,6 CALL LADR_0x013D BTFSS LRAM_0x26,6 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,5 CALL LADR_0x0145 BTFSS LRAM_0x26,5 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,4 CALL LADR_0x014D BTFSS LRAM_0x26,4 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,3 CALL LADR_0x0155 BTFSS LRAM_0x26,3 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,2 CALL LADR_0x015D BTFSS LRAM_0x26,2 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,1 CALL LADR_0x0165 BTFSS LRAM_0x26,1 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x26,0 CALL LADR_0x016D BTFSS LRAM_0x26,0 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x27,7 CALL LADR_0x0175 BTFSS LRAM_0x27,7 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x27,6 CALL LADR_0x017D BTFSS LRAM_0x27,6 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x27,5 CALL LADR_0x0185 BTFSS LRAM_0x27,5 CALL LADR_0x0195 CALL LADR_0x01A6 BTFSC LRAM_0x27,4 CALL LADR_0x018D BTFSS LRAM_0x27,4 CALL LADR_0x0195 CALL LADR_0x01A6 CALL LADR_0x0195 DECFSZ LRAM_0x25,F GOTO LADR_0x00F5 RETURN LADR_0x0135 CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xDB ; b'11011011' d'219' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,5 ; !!Bank!! GPIO - TRISIO BCF GPIO,2 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x013D CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xDD ; b'11011101' d'221' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,5 ; !!Bank!! GPIO - TRISIO BCF GPIO,1 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x0145 CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xDE ; b'11011110' d'222' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,5 ; !!Bank!! GPIO - TRISIO BCF GPIO,0 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x014D CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xF9 ; b'11111001' d'249' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,2 ; !!Bank!! GPIO - TRISIO BCF GPIO,1 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x0155 CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xFA ; b'11111010' d'250' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,2 ; !!Bank!! GPIO - TRISIO BCF GPIO,0 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x015D CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xFC ; b'11111100' d'252' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,1 ; !!Bank!! GPIO - TRISIO BCF GPIO,0 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x0165 CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xDB ; b'11011011' d'219' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,2 ; !!Bank!! GPIO - TRISIO BCF GPIO,5 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x016D CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xDD ; b'11011101' d'221' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,1 ; !!Bank!! GPIO - TRISIO BCF GPIO,5 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x0175 CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xDE ; b'11011110' d'222' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,0 ; !!Bank!! GPIO - TRISIO BCF GPIO,5 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x017D CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xF9 ; b'11111001' d'249' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,1 ; !!Bank!! GPIO - TRISIO BCF GPIO,2 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x0185 CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xFA ; b'11111010' d'250' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,0 ; !!Bank!! GPIO - TRISIO BCF GPIO,2 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x018D CLRF GPIO ; !!Bank!! GPIO - TRISIO BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xFC ; b'11111100' d'252' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select BSF GPIO,0 ; !!Bank!! GPIO - TRISIO BCF GPIO,1 ; !!Bank!! GPIO - TRISIO RETURN LADR_0x0195 BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVLW 0xFF ; b'11111111' d'255' MOVWF GPIO ; !!Bank!! GPIO - TRISIO BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select RETURN LADR_0x019A MOVLW 0x32 ; b'00110010' d'050' "2" MOVWF LRAM_0x20 MOVF LRAM_0x32,W ADDWF LRAM_0x20,F LADR_0x019E CLRWDT DECFSZ LRAM_0x21,F GOTO LADR_0x019E BTFSS GPIO,3 ; !!Bank!! GPIO - TRISIO GOTO LADR_0x01DD DECFSZ LRAM_0x20,F GOTO LADR_0x019E RETURN LADR_0x01A6 MOVLW 0x28 ; b'00101000' d'040' "(" MOVWF LRAM_0x24 LADR_0x01A8 CLRWDT DECFSZ LRAM_0x24,F GOTO LADR_0x01A8 BTFSS GPIO,3 ; !!Bank!! GPIO - TRISIO GOTO LADR_0x01DD RETURN LADR_0x01AE MOVLW 0x32 ; b'00110010' d'050' "2" MOVWF LRAM_0x23 CALL LADR_0x01C4 MOVF LRAM_0x29,W ANDLW 0x0F ; b'00001111' d'015' ADDWF LRAM_0x23,F LADR_0x01B4 CALL LADR_0x019A DECFSZ LRAM_0x23,F GOTO LADR_0x01B4 RETURN LADR_0x01B8 MOVLW 0x08 ; b'00001000' d'008' MOVWF LRAM_0x35 LADR_0x01BA CALL LADR_0x019A DECFSZ LRAM_0x35,F GOTO LADR_0x01BA RETURN LADR_0x01BE MOVLW 0x10 ; b'00010000' d'016' MOVWF LRAM_0x36 LADR_0x01C0 CALL LADR_0x019A DECFSZ LRAM_0x36,F GOTO LADR_0x01C0 RETURN LADR_0x01C4 CLRWDT RRF LRAM_0x2A,F RRF LRAM_0x29,F RRF LRAM_0x28,F BTFSC LRAM_0x28,6 GOTO LADR_0x01CD BTFSC LRAM_0x28,1 GOTO LADR_0x01CF GOTO LADR_0x01D1 LADR_0x01CD BTFSC LRAM_0x28,1 GOTO LADR_0x01D1 LADR_0x01CF BSF LRAM_0x2A,7 GOTO LADR_0x01D2 LADR_0x01D1 BCF LRAM_0x2A,7 LADR_0x01D2 MOVF LRAM_0x2A,F BTFSS STATUS,Z RETLW 0x00 ; b'00000000' d'000' MOVF LRAM_0x29,F BTFSS STATUS,Z RETLW 0x00 ; b'00000000' d'000' MOVF LRAM_0x28,F BTFSS STATUS,Z RETLW 0x00 ; b'00000000' d'000' BSF LRAM_0x2A,7 RETLW 0x00 ; b'00000000' d'000' LADR_0x01DD INCF LRAM_0x31,F MOVLW 0x0F ; b'00001111' d'015' ANDWF LRAM_0x31,F CLRF LRAM_0x30 LADR_0x01E1 CLRWDT NOP DECFSZ LRAM_0x30,F GOTO LADR_0x01E1 BTFSS GPIO,3 ; !!Bank!! GPIO - TRISIO GOTO LADR_0x01E1 CALL LADR_0x018D CALL LADR_0x01EB CALL LADR_0x017D GOTO LADR_0x002D LADR_0x01EB CLRWDT BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select CLRF EEADR ; !!Bank!! Unimplemented - EEADR BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVF LRAM_0x31,W CALL LADR_0x01F9 MOVF LRAM_0x28,W CALL LADR_0x01F9 MOVF LRAM_0x29,W CALL LADR_0x01F9 MOVF LRAM_0x2A,W CALL LADR_0x01F9 CALL LADR_0x0221 RETURN LADR_0x01F9 BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select MOVWF EEDATA ; !!Bank!! Unimplemented - EEDATA INCF EEADR,F ; !!Bank!! Unimplemented - EEADR BSF EECON1,2 ; !!Bank!! Unimplemented - EECON1 MOVLW 0x55 ; b'01010101' d'085' "U" MOVWF EECON2 ; !!Bank!! Unimplemented - EECON2 MOVLW 0xAA ; b'10101010' d'170' MOVWF EECON2 ; !!Bank!! Unimplemented - EECON2 BSF EECON1,1 ; !!Bank!! Unimplemented - EECON1 BCF EECON1,2 ; !!Bank!! Unimplemented - EECON1 LADR_0x0203 CLRWDT BTFSC EECON1,1 ; !!Bank!! Unimplemented - EECON1 GOTO LADR_0x0203 BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select RETURN LADR_0x0208 BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select INCF EEADR,F ; !!Bank!! Unimplemented - EEADR BSF EECON1,0 ; !!Bank!! Unimplemented - EECON1 MOVF EEDATA,W ; !!Bank!! Unimplemented - EEDATA BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select RETURN LADR_0x020E GOTO LADR_0x00AA LADR_0x020F GOTO LADR_0x0045 LADR_0x0210 BSF LRAM_0x2B,0 GOTO LADR_0x0045 LADR_0x0212 GOTO LADR_0x0099 LADR_0x0213 GOTO LADR_0x00B1 LADR_0x0214 BSF LRAM_0x2B,1 GOTO LADR_0x00B1 LADR_0x0216 BSF LRAM_0x2B,2 GOTO LADR_0x00B1 LADR_0x0218 BSF LRAM_0x2B,3 GOTO LADR_0x00B1 LADR_0x021A GOTO LADR_0x0079 LADR_0x021B GOTO LADR_0x0081 LADR_0x021C GOTO LADR_0x0089 LADR_0x021D GOTO LADR_0x0091 LADR_0x021E GOTO LADR_0x0253 LADR_0x021F BSF LRAM_0x2B,5 GOTO LADR_0x00B1 LADR_0x0221 CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A CALL LADR_0x018D CALL LADR_0x019A CALL LADR_0x017D CALL LADR_0x019A RETURN LADR_0x023A CALL LADR_0x0135 CALL LADR_0x01BE CALL LADR_0x013D CALL LADR_0x01BE CALL LADR_0x0145 CALL LADR_0x01BE CALL LADR_0x014D CALL LADR_0x01BE CALL LADR_0x0155 CALL LADR_0x01BE CALL LADR_0x015D CALL LADR_0x01BE CALL LADR_0x0165 CALL LADR_0x01BE CALL LADR_0x016D CALL LADR_0x01BE CALL LADR_0x0175 CALL LADR_0x01BE CALL LADR_0x017D CALL LADR_0x01BE CALL LADR_0x0185 CALL LADR_0x01BE CALL LADR_0x018D CALL LADR_0x01BE RETURN LADR_0x0253 RRF LRAM_0x26,F RRF LRAM_0x27,F BCF LRAM_0x26,7 CALL LADR_0x01C4 MOVF LRAM_0x29,W ANDLW 0x07 ; b'00000111' d'007' BTFSC STATUS,Z BSF LRAM_0x26,7 CALL LADR_0x00F3 GOTO LADR_0x0253 End Attachment(s) icicle.asm (19.19 KB) - downloaded 15 times |
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所以，我把代码拆开了，安塞尔初始化是什么意思？
以上来自于百度翻译 以下为原文 So, I disassembled the code, what do you mean by ANSEL initialization? |
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你查看了683个数据表，看看安塞尔寄存器是做什么的吗？简而言之，“模拟能力”的PIN在模拟模式下被加电。当它们处于模拟模式时，不能使用它们作为数字输入，因此您必须向TENESEL寄存器写入，以将它们切换到数字模式。
以上来自于百度翻译 以下为原文 Have you looked into the 683 datasheet to see what the ANSEL register does? In short, pins which are "analog capable" power up in analog mode. You can't use them as digital inputs when they are in analog mode, so you have to write to th eANSEL register to switch them to digital mode. |
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2018-8-30 18:22:58
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我想知道用于获得该源代码的反汇编程序。在POSTα8中分解的源代码生成一个与POST 1中的HEX文件完全相同的HEX文件。除了A/D之外，另一个显著的区别是RAM，它是12F629中的所有共享数据存储器和12F63中的存储数据存储器。无论如何，要修改它的PIC12F68，用这个代替这个，用这个代替这个
以上来自于百度翻译 以下为原文 I'd like to know the disassembler used to get that source code too. The disassembled source code in Post #8 generates a hex file identical to that in Post #1. Beside the A/D the other significant difference is the RAM, where it's all shared data memory in the 12F629 and banked data memory in the 12F683. Anyway, to modify it for the PIC12F683 replace this processor 12F629 #include __config 0x3F8C ; __config _CPD_OFF & _CP_OFF & _BODEN_OFF & _MCLRE_OFF & _PWRTE_ON & _WDT_ON & _INTRC_OSC_NOCLKOUT with this processor 12F683 #include __config _FCMEN_OFF & _IESO_OFF & _CPD_OFF & _CP_OFF & _BOREN_OFF & _MCLRE_OFF & _PWRTE_ON & _WDT_ON & _INTRC_OSC_NOCLKOUT and replace this NOP NOP NOP NOP ; Interrupt-Vector CLRF GPIO ; !!Bank!! GPIO - TRISIO MOVLW 0x07 ; b'00000111' d'007' MOVWF CMCON ; !!Bank!! CMCON - VRCON with this NOP BANKSEL ANSEL CLRF ANSEL ; all digital BANKSEL GPIO ; Interrupt-Vector CLRF GPIO ; !!Bank!! GPIO - TRISIO MOVLW 0x07 ; b'00000111' d'007' MOVWF CMCON0 ; !!Bank!! CMCON - VRCON |
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P.S.刚刚把它烧到芯片上，它的工作几乎和预期一样（它可能是我的配线上的一个熔丝）。再次感谢！编辑：绝对是电线上的一块，现在工作得很好。
以上来自于百度翻译 以下为原文 P.s. Just burnt it onto the chip, and it all works almost as expected (it's probably a flub on the wiring on my part). Thanks again! Edit: Definitely a flub in the wiring, it's working perfectly now. |
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