stm32f769discovery 寄存器配置ETH，无操作系统移植lwip141--上

ti

本帖最后由 lee_st 于 2018-4-3 09:26 编辑

一直以来都想搞个寄存器配置版本的ETH,最近时间充裕，花了近2周，昨天终于实现了以太网的连接，上图

这是打印结果
下面详细说明一下
首先实现lan8742的驱动

/* Ethernet pins configuration ************************************************/

  /*

      RMII_REF_CLK ----------------------> PA1

      RMII_MDIO -------------------------> PA2

      RMII_MDC --------------------------> PC1

      RMII_MII_CRS_DV -------------------> PA7

      RMII_MII_RXD0 ---------------------> PC4

      RMII_MII_RXD1 ---------------------> PC5

      RMII_MII_RXER ---------------------> PG2/PD5

      RMII_MII_TX_EN --------------------> PG11

      RMII_MII_TXD0 ---------------------> PG13

      RMII_MII_TXD1 ---------------------> PG14

  */

*(uint32_t *)0x40023830 |=  0x45; //使能PORTACG时钟 0x4d,ACDG

*(uint32_t *)0x40023830 |=  0xf000000; //使能ETH,TX,RX,MAC时钟

GPIO_Set(GPIOA,PIN1|PIN2|PIN7,GPIO_MODE_AF,GPIO_OTYPE_PP,GPIO_SPEED_100M,GPIO_PUPD_NONE); //PB3,PB4设置

      GPIO_AF_Set(GPIOA,1,11);       //PA1,AF11

GPIO_AF_Set(GPIOA,2,11);       //PA2,AF11

GPIO_AF_Set(GPIOA,7,11);       //PA7,AF11

GPIO_Set(GPIOC,PIN1|PIN4|PIN5,GPIO_MODE_AF,GPIO_OTYPE_PP,GPIO_SPEED_100M,GPIO_PUPD_NONE); //PB3,PB4设置

      GPIO_AF_Set(GPIOC,1,11);       //PC1,AF11

GPIO_AF_Set(GPIOC,4,11);       //PC4,AF11

GPIO_AF_Set(GPIOC,5,11);       //PC5,AF11

GPIO_Set(GPIOD,PIN5,GPIO_MODE_AF,GPIO_OTYPE_PP,GPIO_SPEED_100M,GPIO_PUPD_NONE); //PB3,PB4设置

      GPIO_AF_Set(GPIOD,5,11);       //PD5,AF11

GPIO_Set(GPIOG,PIN2|PIN11|PIN13|PIN14,GPIO_MODE_AF,GPIO_OTYPE_PP,GPIO_SPEED_100M,GPIO_PUPD_NONE); //PB3,PB4设置

      GPIO_AF_Set(GPIOG,2,11);       //PG2,AF11

GPIO_AF_Set(GPIOG,11,11);       //PG11,AF11

GPIO_AF_Set(GPIOG,13,11);       //PG13,AF11

GPIO_AF_Set(GPIOG,14,11);       //PG14,AF11

MY_NVIC_Init(0,0,ETH_IRQn,2);       //配置ETH中的分组
复制代码

然后实现LAN8742寄存器的配置

*(uint32_t *)0x40023830 |=  0x400000;

RCC->AHB1RSTR |= 0x02000000;

/* Enable SYSCFG Clock */

*(uint32_t *)0x40023844 |= 0x4000;

SYSCFG->PMC &= ~(SYSCFG_PMC_MII_RMII_SEL);

SYSCFG->PMC |= 0x800000;//RMII

RCC->AHB1RSTR &=  ~ 0x02000000;

ETH->DMABMR |= 0x1; //software reset

while (ETH->DMABMR & ETH_DMABMR_SR);

/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */

ETH->MACMIIAR = (uint32_t)(1<<4);

write_PHY(PHY_BCR, PHY_RESET);

/* 等待复位完成 */

for (tout = 0; tout < 0x10000; tout++)

{

      read_PHY (PHY_BSR,®v);

      if (!(regv & PHY_LINKED_STATUS))

      {

         /* 复位完成 */

         printf("2. Reset Completern");

         break;

      }

}

write_PHY(PHY_BCR, PHY_AUTONEGOTIATION);

for (tout = 0; tout < 0x10000; tout++)

{

      read_PHY (PHY_BSR,®v);

      if (!(regv & PHY_AUTONEGO_COMPLETE))

      {

         /* 复位完成 */

         printf("3. Auto-Negotiation Completern");

         break;

      }

}

for (tout = 0; tout < 0x1000; tout++);

read_PHY (PHY_SR,®v);

printf("%xrn",regv);

   /* Configure the MAC with the Duplex Mode fixed by the auto-negotiation process */

if((regv & PHY_DUPLEX_STATUS) != (uint32_t)RESET)

{

   /* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */

   printf("4. Full-duplex connectionrn");

      phyreg |= ETH_MODE_FULLDUPLEX;

}

else

{

   /* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */

   printf("4. half-duplex connectionrn");

      phyreg |= ETH_MODE_HALFDUPLEX;

}

if((regv & PHY_SPEED_STATUS) != (uint32_t)RESET)

{

   /* Set Ethernet duplex mode to Full-duplex following the auto-negotiation */

   printf("5. 10Mbps Modern");

      phyreg |= ETH_SPEED_10M;

}

else

{

   /* Set Ethernet duplex mode to Half-duplex following the auto-negotiation */

   printf("5. 100Mbps Modern");

      phyreg |= ETH_SPEED_100M;

}

   /* Config MAC and DMA */

  ETH_MACDMAConfig(heth, phyreg);
复制代码

下面是实现读写的函数

void write_PHY (uint32_t PhyReg, uint16_t RegValue)

{

      uint32_t tout;

uint32_t tmpreg = 0;

  ETH->MACMIIDR = (uint16_t)RegValue;

      /* Get the ETHERNET MACMIIAR value */

  tmpreg = ETH->MACMIIAR;



  /* Keep only the CSR Clock Range CR[2:0] bits value */

  tmpreg &= ~ETH_MACMIIAR_CR_MASK;



  /* Prepare the MII register address value */

  tmpreg |=(((uint32_t)(LAN8742A_PHY_ADDRESS << 11)) & ETH_MACMIIAR_PA); /* Set the PHY device address */

  tmpreg |=(((uint32_t)PhyReg<<6) & ETH_MACMIIAR_MR);                /* Set the PHY register address */

  tmpreg |= ETH_MACMIIAR_MW;                                        /* Set the write mode */

  tmpreg |= ETH_MACMIIAR_MB;                                        /* Set the MII Busy bit */



  /* Write the result value into the MII Address register */

  ETH->MACMIIAR = tmpreg;

      /* 等待操作完成，即等待MMAR_MB位被清零 */

      tout = 0;

      for (tout = 0; tout < MII_WR_TOUT; tout++)

      {

            if ((ETH->MACMIIAR & ETH_MACMIIAR_MB) == 0)

            {

                     break;

            }

      }

}

void read_PHY (uint32_t PhyReg,uint32_t *RegValue)

{

      uint32_t tout;

   uint32_t tmpreg = 0;

      tmpreg = ETH->MACMIIAR;



  /* Keep only the CSR Clock Range CR[2:0] bits value */

  tmpreg &= ~ETH_MACMIIAR_CR_MASK;



  /* Prepare the MII address register value */

  tmpreg |=(((uint32_t)(LAN8742A_PHY_ADDRESS << 11)) & ETH_MACMIIAR_PA); /* Set the PHY device address */

  tmpreg |=(((uint32_t)PhyReg<<6) & ETH_MACMIIAR_MR);                /* Set the PHY register address */

  tmpreg &= ~ETH_MACMIIAR_MW;                                        /* Set the read mode          */

  tmpreg |= ETH_MACMIIAR_MB;                                           /* Set the MII Busy bit       */



  /* Write the result value into the MII Address register */

  ETH->MACMIIAR = tmpreg;

      /* 等待操作完成，即等待MMAR_MB位被清零 */

      tout = 0;

      for (tout = 0; tout < MII_RD_TOUT; tout++)

      {

            if ((ETH->MACMIIAR & ETH_MACMIIAR_MB) == 0)

            {

                     break;

            }

      }

      /* Get MACMIIDR value */

  *RegValue = (uint16_t)(ETH->MACMIIDR);

      /* 从 PHY 中读取16bit的数据值 */

}
复制代码

保存可以正常运行，并且连上lan8742芯片
下面开始移植lwp141，步骤就不说了，网上有

直接给出代码

static void low_level_init(struct netif *netif)
{
uint8_t macaddress[6]= { MAC_ADDR0, MAC_ADDR1, MAC_ADDR2, MAC_ADDR3, MAC_ADDR4, MAC_ADDR5 };
EthHandle.Instance = ETH;
EthHandle.Init.MACAddr = macaddress;
EthHandle.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
EthHandle.Init.Speed = ETH_SPEED_100M;
EthHandle.Init.DuplexMode = ETH_MODE_FULLDUPLEX;
EthHandle.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
EthHandle.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
/* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
lan8742_init(&EthHandle);
/* Initialize Tx Descriptors list: Chain Mode */
HAL_ETH_DMATxDescListInit(&EthHandle, DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
/* Initialize Rx Descriptors list: Chain Mode */
HAL_ETH_DMARxDescListInit(&EthHandle, DMARxDscrTab, &Rx_Buff[0][0], ETH_RXBUFNB);
/* Set netif link flag */
netif->flags |= NETIF_FLAG_LINK_UP;
/* set netif MAC hardware address length */
netif->hwaddr_len = ETHARP_HWADDR_LEN;
/* set netif MAC hardware address */
netif->hwaddr[0] = MAC_ADDR0;
netif->hwaddr[1] = MAC_ADDR1;
netif->hwaddr[2] = MAC_ADDR2;
netif->hwaddr[3] = MAC_ADDR3;
netif->hwaddr[4] = MAC_ADDR4;
netif->hwaddr[5] = MAC_ADDR5;
/* set netif maximum transfer unit */
netif->mtu = 1500;
/* Accept broadcast address and ARP traffic */
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
}
err_t low_level_output(struct netif *netif, struct pbuf *p)
{
err_t errval;
struct pbuf *q;
uint8_t *buffer = (uint8_t *)(EthHandle.TxDesc->Buffer1Addr);
__IO ETH_DMADescTypeDef *DmaTxDesc;
uint32_t framelength = 0;
uint32_t bufferoffset = 0;
uint32_t byteslefttocopy = 0;
uint32_t payloadoffset = 0;
DmaTxDesc = EthHandle.TxDesc;
bufferoffset = 0;
/* copy frame from pbufs to driver buffers */
for(q = p; q != NULL; q = q->next)
{
/* Is this buffer available? If not, goto error */
if((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
{
errval = ERR_USE;
goto error;
}
/* Get bytes in current lwIP buffer */
byteslefttocopy = q->len;
payloadoffset = 0;
/* Check if the length of data to copy is bigger than Tx buffer size*/
while( (byteslefttocopy + bufferoffset) > ETH_TX_BUF_SIZE )
{
/* Copy data to Tx buffer*/
memcpy( (uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), (ETH_TX_BUF_SIZE - bufferoffset) );
/* Point to next descriptor */
DmaTxDesc = (ETH_DMADescTypeDef *)(DmaTxDesc->Buffer2NextDescAddr);
/* Check if the buffer is available */
if((DmaTxDesc->Status & ETH_DMATXDESC_OWN) != (uint32_t)RESET)
{
errval = ERR_USE;
goto error;
}
buffer = (uint8_t *)(DmaTxDesc->Buffer1Addr);
byteslefttocopy = byteslefttocopy - (ETH_TX_BUF_SIZE - bufferoffset);
payloadoffset = payloadoffset + (ETH_TX_BUF_SIZE - bufferoffset);
framelength = framelength + (ETH_TX_BUF_SIZE - bufferoffset);
bufferoffset = 0;
}
/* Copy the remaining bytes */
memcpy( (uint8_t*)((uint8_t*)buffer + bufferoffset), (uint8_t*)((uint8_t*)q->payload + payloadoffset), byteslefttocopy );
bufferoffset = bufferoffset + byteslefttocopy;
framelength = framelength + byteslefttocopy;
}
/* Clean and Invalidate data cache */
SCB_CleanInvalidateDCache ();
/* Prepare transmit descriptors to give to DMA */
HAL_ETH_TransmitFrame(&EthHandle, framelength);
errval = ERR_OK;
error:
/* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
if ((EthHandle.Instance->DMASR & ETH_DMASR_TUS) != (uint32_t)RESET)
{
/* Clear TUS ETHERNET DMA flag */
EthHandle.Instance->DMASR = ETH_DMASR_TUS;
/* Resume DMA transmission*/
EthHandle.Instance->DMATPDR = 0;
}
return errval;
}
/**
* [url=home.php?mod=space&uid=159083]@brief[/url] Should allocate a pbuf and transfer the bytes of the incoming
* packet from the interface into the pbuf.
*
* @param netif the lwip network interface structure for this ethernetif
* [url=home.php?mod=space&uid=784970]@return[/url] a pbuf filled with the received packet (including MAC header)
* NULL on memory error
*/
struct pbuf * low_level_input(struct netif *netif)
{
struct pbuf *p = NULL, *q = NULL;
uint16_t len = 0;
uint8_t *buffer;
__IO ETH_DMADescTypeDef *dmarxdesc;
uint32_t bufferoffset = 0;
uint32_t payloadoffset = 0;
uint32_t byteslefttocopy = 0;
uint32_t i=0;
/* get received frame */
if(ETH_GetReceivedFrame(&EthHandle) != 0)
return NULL;
/* Obtain the size of the packet and put it into the "len" variable. */
len = EthHandle.RxFrameInfos.length;
buffer = (uint8_t *)EthHandle.RxFrameInfos.buffer;
if (len > 0)
{
/* We allocate a pbuf chain of pbufs from the Lwip buffer pool */
p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
printf("recv is okrn");
}
/* Clean and Invalidate data cache */
SCB_CleanInvalidateDCache ();
if (p != NULL)
{
dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
bufferoffset = 0;
for(q = p; q != NULL; q = q->next)
{
byteslefttocopy = q->len;
payloadoffset = 0;
/* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size */
while( (byteslefttocopy + bufferoffset) > ETH_RX_BUF_SIZE )
{
/* Copy data to pbuf */
memcpy( (uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), (ETH_RX_BUF_SIZE - bufferoffset));
/* Point to next descriptor */
dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
buffer = (uint8_t *)(dmarxdesc->Buffer1Addr);
byteslefttocopy = byteslefttocopy - (ETH_RX_BUF_SIZE - bufferoffset);
payloadoffset = payloadoffset + (ETH_RX_BUF_SIZE - bufferoffset);
bufferoffset = 0;
}
/* Copy remaining data in pbuf */
memcpy( (uint8_t*)((uint8_t*)q->payload + payloadoffset), (uint8_t*)((uint8_t*)buffer + bufferoffset), byteslefttocopy);
bufferoffset = bufferoffset + byteslefttocopy;
}
}
/* Release descriptors to DMA */
/* Point to first descriptor */
dmarxdesc = EthHandle.RxFrameInfos.FSRxDesc;
/* Set Own bit in Rx descriptors: gives the buffers back to DMA */
for (i=0; i< EthHandle.RxFrameInfos.SegCount; i++)
{
dmarxdesc->Status |= ETH_DMARXDESC_OWN;
dmarxdesc = (ETH_DMADescTypeDef *)(dmarxdesc->Buffer2NextDescAddr);
}
/* Clear Segment_Count */
EthHandle.RxFrameInfos.SegCount =0;
/* When Rx Buffer unavailable flag is set: clear it and resume reception */
if ((EthHandle.Instance->DMASR & ETH_DMASR_RBUS) != (uint32_t)RESET)
{
/* Clear RBUS ETHERNET DMA flag */
EthHandle.Instance->DMASR = ETH_DMASR_RBUS;
/* Resume DMA reception */
EthHandle.Instance->DMARPDR = 0;
}
return p;
}
void ethernetif_input( void const * argument )
{
struct pbuf *p;
struct netif *netif = (struct netif *) argument;
p = low_level_input( netif );
if (p != NULL)
{
if (netif->input( p, netif) != ERR_OK )
{
LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input errorn"));
pbuf_free(p);
}
}
}
err_t ethernetif_init(struct netif *netif)
{
LWIP_ASSERT("netif != NULL", (netif != NULL));
#if LWIP_NETIF_HOSTNAME
/* Initialize interface hostname */
netif->hostname = "lwip";
#endif /* LWIP_NETIF_HOSTNAME */
netif->name[0] = IFNAME0;
netif->name[1] = IFNAME1;
/* We directly use etharp_output() here to save a function call.
* You can instead declare your own function an call etharp_output()
* from it if you have to do some checks before sending (e.g. if link
* is available...) */
netif->output = etharp_output;
netif->linkoutput = low_level_output;
/* initialize the hardware */
low_level_init(netif);
return ERR_OK;
}

复制代码

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stm32f769discovery 寄存器配置ETH，无操作系统移植lwip141--上

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