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AM335x-GPMC 使用总结

2018-3-13 11:04:40 7493 AM335x

0 AM335X GPMC使用比较灵活，可以配置为 ● 8-bit 同步或者异步并行总线 (非burst) ● 16-bit 同步或者异步并行中线 ● 16-bit 非复用的NORFlash ● 16-bit 数据和地址总线复用的NORFlash ● 8-bit 和 16-bitNAND Flash ● 16-bit pSRAM. 下面以EVB-335X（）扩展EXAR ST16C554为例，讲解如何配置GPMC。 1. 配置GPMC引脚 static structpinmux_config gpmc_pin_mux[] = { /******* 8-bit data bus **********/ {"gpmc_ad0.gpmc_ad0", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad1.gpmc_ad1", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad2.gpmc_ad2", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad3.gpmc_ad3", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad4.gpmc_ad4", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, {"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 \| AM33XX_PIN_INPUT_PULLUP}, /************ 8-bit address bus *************/ {"gpmc_a0.gpmc_a0", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a1.gpmc_a1", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a2.gpmc_a2", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a3.gpmc_a3", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a4.gpmc_a4", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a5.gpmc_a5", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a6.gpmc_a6", OMAP_MUX_MODE0\| AM33XX_PIN_OUTPUT}, {"gpmc_a7.gpmc_a7", OMAP_MUX_MODE0 \|AM33XX_PIN_OUTPUT}, {"gpmc_csn2.gpmc_csn2", OMAP_MUX_MODE0 \| AM33XX_PULL_DISA}, {"gpmc_oen_ren.gpmc_oen_ren", OMAP_MUX_MODE0 \| AM33XX_PULL_DISA}, {"gpmc_wen.gpmc_wen", OMAP_MUX_MODE0 \| AM33XX_PULL_DISA}, {NULL, 0}, }; setup_pin_mux(gpmc_pin_mux); 2. 申请GPMC内存 unsigned long serial_gpmc_mem_base_phys; int cs = 2; /EVB335X评估板中ST16C554接在CS2上 / gpmc_cs_request(cs, SZ_16M, &serial_gpmc_mem_base_phys) 此时serial_gpmc_mem_base_phys存放的是该CS上多对应的物理起始地址。 3. 设置GMPC类型 gpmc_cs_configure(cs, GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NOR);/设置为并行总线/ val = GPMC_CONFIG1_READTYPE_SYNC; / 设置为8-bit sync / val \|= GPMC_CONFIG1_WRITETYPE_SYNC; gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, val); 4. 设置GPMC时序因此时序设置为: (单位ns) static structgpmc_timings ext_uart_timings = { / Minimum clock period for synchronous mode (in picoseconds)/ .sync_clk = 0, / CS signal timings corresponding to GPMC_CONFIG2 / .cs_on = 10, /T6s / .cs_rd_off = 80, /oe_off + T7h / .cs_wr_off = 60, /Tcs for write: we_off + T13h / / ADV signal timings corresponding to GPMC_CONFIG3 / // .adv_on = 0, / Address setup Tas/ // .adv_rd_off = 110, / Read deassertion time Trd + Tdd/ // .adv_wr_off = 90, / Write deassertion time Twr + Tdh/ / WE signals timings corresponding to GPMC_CONFIG4 / .we_on = 20, /WE assertion time: cs_on + T13d / .we_off = 60, /WE deassertion time: we_on + T13w / / OE signals timings corresponding to GPMC_CONFIG4 / .oe_on = 20, /OE assertion time: cs_on + T7d / .oe_off = 70, /OE deassertion time: oe_on + T7w / / Access time and cycle time timings corresponding toGPMC_CONFIG5 / // .page_burst_access = 2 10, /* Multiple access word delay / .access = 60, /Start-cycle to first data valid delay: at leaset oe_on + T12d / .rd_cycle = 110, /Total read cycle time: cs_rd_off + (T9d - T7h) - oe_on / .wr_cycle = 90, /Total write cycle time: cs_wr_off + (T15d - T13h) - we_on / / The following are only on OMAP3430 / .wr_access = 40, /WRACCESSTIME: max we_off - T16s / .wr_data_mux_bus = 0, /WRDATAONADMUXBUS */ }; gpmc_cs_set_timings(cs,&ext_uart_timings) 0
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