完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
Primary Allegro PCB Editor Programs .........................................................................................1-2 Other Programs .......................................................................................................................1-3 Cadence SPB Tools .......................................................................................................................1-4 Course Directory Structure............................................................................................................1-5 Setting and Changing Your Working Directory............................................................................1-7 Allegro PCB Editor and Workspace..............................................................................................1-8 Fold-Away Window Tabs.....................................................................................................1-10 Getting Help ...............................................................................................................................1-11 Lab ..............................................................................................................................................1-12 Lab 1-1: Allegro PCB Editor Tour ............................................................................................1-13 Mouse Buttons............................................................................................................................1-19 Controlling the Window Display.................................................................................................1-20 Navigating in the World View Window......................................................................................1-21 Zoom Control Using the Middle Mouse Button..........................................................................1-23 Default Aliases for Function and Control Keys ..........................................................................1-24 Running Commands with Strokes ...............................................................................................1-25 Controlling the Toolbars..............................................................................................................1-26 Design Parameters Editor ............................................................................................................1-27 Display Folder Tab................................................................................................................1-28 Design Folder Tab .......................................................................................................................1-30 Design Folder Tab – Line Lock ............................................................................................1-32 Text Folder Tab ...........................................................................................................................1-33 User Preferences ..........................................................................................................................1-34 Using OpenGL............................................................................................................................1-35 Lab ..............................................................................................................................................1-36 Lab 1-2: Navigating the PCB Editor User Interface..................................................................1-37 Lesson 2: Managing the PCB Editor Work Environment .....................................................................2-1 Folders and Classes and Subclasses ..............................................................................................2-2 More Folders and Classes and Subclasses ..............................................................................2-3 Controlling Color and Visibility....................................................................................................2-4 Controlling Etch Visibility......................................................................................................2-5 Graphics Dimming or Shadow Mode .....................................................................................2-6 Scripts ...........................................................................................................................................2-8 Export and Import Parameters.......................................................................................................2-9 Lab ..............................................................................................................................................2-10 Lab 2-1: Script Files and Controlling Visibility and Color .......................................................2-11 Find Window - Post Select Objects List......................................................................................2-18 Using the Find by Name Section ..........................................................................................2-19 Using Find by Property .........................................................................................................2-20 Application Modes ......................................................................................................................2-21 Pre-selection Mode......................................................................................................................2-22 Creating a Selection Set...............................................................................................................2-23 Right Mouse Button Use .............................................................................................................2-24 Allegro PCB Editor Table of Contents vi Allegro PCB Editor February 1, 2008 Right Mouse Button Common Areas ..........................................................................................2-25 Using the Super Filter..................................................................................................................2-27 Context-Sensitive RMB Pop-Up Menu.......................................................................................2-28 Etch Edit Default Command Execution ......................................................................................2-29 General Edit Default Command Execution .................................................................................2-30 Highlighting Elements .................................................................................................................2-31 Using the Show Element Command............................................................................................2-32 Using the Display Measure Command........................................................................................2-33 Options Window.........................................................................................................................2-34 Labs.............................................................................................................................................2-35 Lab 2-2: Highlighting and Using the Find Filter .......................................................................2-36 Lab 2-3: Using the Find Filter with the Show Element Command ...........................................2-43 Lesson 3: padstacks ...............................................................................................................................3-1 Anatomy of a Padstack ..................................................................................................................3-2 Padstack Details............................................................................................................................3-3 What is a Thermal Relief? .............................................................................................................3-4 Flash Symbols...............................................................................................................................3-5 What Does the Padstack Designer Do? .........................................................................................3-6 Padstack Designer - Parameters ..............................................................................................3-7 Padstack Designer - Layers.....................................................................................................3-9 Defining Pad Shapes/Sizes....................................................................................................3-10 Adding/Deleting/Copying Layers .........................................................................................3-11 Saving the Padstack...............................................................................................................3-12 Labs.............................................................................................................................................3-14 Lab 3-1: Creating a Flash Symbol .............................................................................................3-15 Lab 3-2: Creating Padstacks for a Through-Hole Pin Device ...................................................3-19 Lab 3-3: Creating a Padstack for a Surface- Mounted Device ..................................................3-28 Lesson 4: Component Symbols .............................................................................................................4-1 Package Symbol Wizard................................................................................................................4-1 Design Parameters .........................................................................................................................4-2 Drawing Origin.............................................................................................................................4-3 Moving the Drawing Origin....................................................................................................4-4 PCB Editor Symbol Types.............................................................................................................4-5 Example: a 14-pin DIP Package....................................................................................................4-6 Adding Pins............................................................................................................................4-7 Drawing Component Outlines.................................................................................................4-9 Adding Labels .......................................................................................................................4-10 Defining Area Constraints.....................................................................................................4-11 Saving Symbol Files .............................................................................................................4-12 Labs.............................................................................................................................................4-13 Lab 4-1: Creating a DIP16 Package Using the Package Symbol Wizard..................................4-14 Lab 4-2: Creating a DIP14 Package Symbol .............................................................................4-18 Lab 4-3: Creating an SOIC16 with the Symbol Editor (optional lab).......................................4-29 Lesson 5: Board Design Files ................................................................................................................5-1 Creating a Board Symbol...............................................................................................................5-2 Typical Board Outline.............................................................................................................5-3 Drawing a Board Outline ........................................................................................................5-4 Tooling/Mounting Holes.........................................................................................................5-5 Table of Contents Allegro PCB Editor February 1, 2008 Allegro PCB Editor vii Chamfers ................................................................................................................................5-6 Linear Dimensioning...............................................................................................................5-7 Defining Constraint Areas (Keepins/Keepouts) .....................................................................5-8 Saving Board Symbol Files (.bsm and .dra) ...........................................................................5-9 Labs ............................................................................................................................................5-11 Lab 5-1: Creating a Board Mechanical Symbol ........................................................................5-12 Allegro PCB Editors - Overview ..........................................................................................5-29 Creating a Master Design File .....................................................................................................5-30 Defining Layer Stackup ........................................................................................................5-31 Lab ..............................................................................................................................................5-32 Lab 5-2: Creating a Master Design File (.brd)...........................................................................5-33 Lesson 6: Importing Logic Information into Allegro PCB Editor ........................................................6-1 Design Layout Process ..................................................................................................................6-2 Design Entry HDL-Integrated Logic Design with Physical Layout..............................................6-3 Transfer Files (pst*.dat) ..........................................................................................................6-4 Transferring Constraint Manager Information........................................................................6-6 Importing Logic into PCB Editor from Design Entry HDL ...................................................6-7 Importing Logic Data..............................................................................................................6-8 Engineering Changes—Placement ................................................................................................6-9 Importing Electrical Constraints..................................................................................................6-10 Engineering Changes—Routing ..................................................................................................6-11 Schematic-Driven Layout............................................................................................................6-13 Design Entry CIS-Integrated Logic Design with Physical Layout..............................................6-14 Design Entry CIS Interface with PCB Editor .......................................................................6-15 Design Entry CIS-PCB Editor Logic Import ........................................................................6-16 Third-Party Logic Import ............................................................................................................6-17 Netlist Format .......................................................................................................................6-18 General Rules for Netlists .....................................................................................................6-19 Device Files..........................................................................................................................6-20 Package Properties in Device Files.......................................................................................6-21 Loading a Third-Party Netlist ...............................................................................................6-22 Netin Checking .....................................................................................................................6-23 Guidelines for Importing Logical Data.................................................................................6-24 Labs ............................................................................................................................................6-25 Lab 6-1: Design Entry HDL to PCB Editor...............................................................................6-26 Lab 6-2: Design Entry CIS to PCB Editor.................................................................................6-32 Lab 6-3: Importing a Third-Party Netlist...................................................................................6-35 Lesson 7: Setting Design Constraints ....................................................................................................7-1 Design Layout Process ..................................................................................................................7-2 Introduction to Design Rules.........................................................................................................7-3 The Constraint Manager ................................................................................................................7-4 Constraint Manager Left Pane ................................................................................................7-5 Constraint Manager Work Area ....................................................................................................7-6 Setting Default Physical Values ....................................................................................................7-7 Creating a New Physical CSet ................................................................................................7-9 Identify the Special Physical Nets ........................................................................................7-10 Assign the Net Class to a Constraint Set...............................................................................7-11 Assign Rules Directly on a Net ...................................................................................................7-12 Lab ..............................................................................................................................................7-13 Allegro PCB Editor Table of Contents viii Allegro PCB Editor February 1, 2008 Lab 7-1: Setting Physical Rules .................................................................................................7-14 Setting Default Spacing Values ...................................................................................................7-18 Creating a New Spacing CSet ...............................................................................................7-19 Identify the Special Spacing Nets .........................................................................................7-20 Assign the Net Class to a Constraint Set...............................................................................7-21 Net Class to Net Class Spacing ...................................................................................................7-22 Labs.............................................................................................................................................7-23 Lab 7-2: Setting Spacing Rules..................................................................................................7-24 Lab 7-3: Setting Class-Class Rules............................................................................................7-27 Design Constraints......................................................................................................................7-33 Physical and Spacing DRC Modes..............................................................................................7-34 Property Assignments and Changes ............................................................................................7-35 Constraint Overrides....................................................................................................................7-37 Physical Constraint Resolution....................................................................................................7-38 Spacing Constraint Resolution ....................................................................................................7-39 DRC Marker Display...................................................................................................................7-40 Lab ..............................................................................................................................................7-41 Lab 7-4: Working with Properties .............................................................................................7-42 Lesson 8: Component Placement...........................................................................................................8-1 Design Layout Process ..................................................................................................................8-2 Prerequisites..................................................................................................................................8-3 Interactive Placement.....................................................................................................................8-4 Placement Grid........................................................................................................................8-5 Strategy.........................................................................................................................................8-6 Floorplanning with Rooms ............................................................................................................8-7 Creating a Room .....................................................................................................................8-8 Assign RefDes Command............................................................................................................8-10 Labs.............................................................................................................................................8-11 Lab 8-1: Floorplanning ..............................................................................................................8-12 Lab 8-2: Assigning Preplaced Packages ....................................................................................8-17 Placement-Related Properties......................................................................................................8-19 Placement Commands .................................................................................................................8-20 Manual Placement Commands..............................................................................................8-21 Changing the Default Orientation................................................................................................8-23 Lab ..............................................................................................................................................8-24 Lab 8-3: Manual Placement .......................................................................................................8-25 Quickplace ..................................................................................................................................8-31 Deleting Components ..................................................................................................................8-33 Labs.............................................................................................................................................8-34 Lab 8-4: Using Quickplace ........................................................................................................8-35 Lab 8-5: Removing Components from the Board......................................................................8-44 Lesson 9: Advanced Placement .............................................................................................................9-1 Ratsnest.........................................................................................................................................9-2 Automatic Swapping of Functions and Pins..................................................................................9-3 Automatic Swap......................................................................................................................9-4 Running Automatic Swap .......................................................................................................9-5 Interactive Swap......................................................................................................................9-6 Selecting Alternate Packages.........................................................................................................9-7 Updating Symbols in a Design ......................................................................................................9-9 Table of Contents Allegro PCB Editor February 1, 2008 Allegro PCB Editor ix Updating Padstacks......................................................................................................................9-10 Modifying Padstacks.............................................................................................................9-12 Creating a Library from a Design................................................................................................9-13 Cross Placement with DE HDL...................................................................................................9-14 Cross Selection with DE CIS.......................................................................................................9-15 Cross Highlighting between PCB Editor and DE CIS..........................................................9-16 Labs ............................................................................................................................................9-17 Lab 9-1: Displaying Ratsnests ...................................................................................................9-18 Lab 9-2: Swapping Components, Pins, and Functions ..............................................................9-20 Lab 9-3: Advanced Placement with ALT_SYMBOL (Optional)..............................................9-23 Lab 9-4: Using the DE HDL Schematic for Manual Placement (Optional) ..............................9-25 Lab 9-5: Using the DE CIS Schematic for Manual Placement (Optional) ................................9-29 Lesson 10: Routing and Glossing ..........................................................................................................10-1 Design Layout Process ................................................................................................................10-2 Accessing Interactive Routing Modes.........................................................................................10-3 Routing Grids: Fixed.............................................................................................................10-4 Routing Grids: Variable ........................................................................................................10-5 Adding Signal Connections .........................................................................................................10-6 Inserting Vias..............................................................................................................................10-8 Selecting Via Types ..............................................................................................................10-9 Define Blind/Buried Via............................................................................................................10-10 Pop-Up Menu Options...............................................................................................................10-11 Options Form............................................................................................................................10-13 Options Form—Smooth......................................................................................................10-15 Options Form—Bubble/Gridless/Vias................................................................................10-16 Setting Interactive Route Parameters ........................................................................................10-18 Labs ..........................................................................................................................................10-19 Lab 10-1:Defining Etch Grids ..................................................................................................10-20 Lab 10-2:Adding and Deleting Connect Lines and Vias..........................................................10-22 Accessing the PCB Router ........................................................................................................10-30 Autoroute Prerequisites .............................................................................................................10-30 Preparing for Automatic Routing ..............................................................................................10-31 The PCB Editor-PCB Router Process .......................................................................................10-32 Labs ..........................................................................................................................................10-33 Lab 10-3:Preparing for Autorouting.........................................................................................10-34 Lab 10-4:Using the PCB Router...............................................................................................10-40 Editing Existing Etch.................................................................................................................10-43 Moving Etch with the Slide Option...........................................................................................10-44 Editing Vertices .........................................................................................................................10-46 Changing the Layer or Width of a Connection..........................................................................10-47 Deleting Etch .............................................................................................................................10-48 Using the Cut Option.................................................................................................................10-49 Interactive Routing Properties ...................................................................................................10-50 Glossing the Design...................................................................................................................10-51 Labs ..........................................................................................................................................10-53 Lab 10-5:Checking for Unconnected Pins................................................................................10-54 Lab 10-6:Improving Routed Connections ................................................................................10-56 Lab 10-7:Replacing Etch and Using the Cut Option................................................................10-60 Lab 10-8:Running Gloss...........................................................................................................10-64 Allegro PCB Editor Table of Contents x Allegro PCB Editor February 1, 2008 Lesson 11: Copper Areas and Positive or Negative Planes ..................................................................11-1 Design Layout Process ................................................................................................................11-2 Copper Area Images ....................................................................................................................11-3 Adding a Copper Area .................................................................................................................11-4 Global Dynamic Parameters - Shape Fill..............................................................................11-6 Global Dynamic Parameters - Void Controls .......................................................................11-7 Global Dynamic Parameters - Clearances.............................................................................11-8 Global Dynamic Parameters - Thermal Relief Connects......................................................11-9 Adding Copper Shapes........................................................................................................11-10 Editing Copper Shapes........................................................................................................11-11 Lab ............................................................................................................................................11-12 Lab 11-1:Copper Areas.............................................................................................................11-13 Lesson 12: Preparing for Post Processing.............................................................................................12-1 Design Layout Process ................................................................................................................12-2 Renaming Reference Designators................................................................................................12-3 Rename Reference Designators Main Form.........................................................................12-4 Rename Reference Designators Setup Form.........................................................................12-5 Rename Reference Designators—Key Points.......................................................................12-7 Backannotation ............................................................................................................................12-8 Backannotation Examples ...........................................................................................................12-9 Backannotation—DE HDL Export Netlist..........................................................................12-10 Backannotation to DE HDL................................................................................................12-11 Property Backannotation.....................................................................................................12-12 DE CIS Integrated Logic Design/Physical Layout .............................................................12-13 PCB Editor-DE CIS Backannotation ..................................................................................12-14 Third-Party Backannotation Process...................................................................................12-15 Third-Party Backannotation................................................................................................12-16 Labs...........................................................................................................................................12-17 Lab 12-1:Renaming Components .............................................................................................12-18 Lab 12-2:PCB Editor to DE HDL Backannotation ..................................................................12-22 Lab 12-3:PCB Editor to DE CIS Backannotation ....................................................................12-24 Lab 12-4:PCB Editor Backannotation to a Third-Party Schematic..........................................12-25 Lesson 13: Preparing the Board Design for Manufacturing ..................................................................13-1 Design Layout Process ................................................................................................................13-2 Creating Silkscreens ....................................................................................................................13-3 Creating Silkscreens—Menu ................................................................................................13-4 Incremental Update of Silkscreens........................................................................................13-6 Generating Reports ......................................................................................................................13-7 Labs.............................................................................................................................................13-8 Lab 13-1:Creating Silkscreens....................................................................................................13-9 Lab 13-2:Creating Reports........................................................................................................13-12 Checking the Board Status.........................................................................................................13-13 Waiving DRCs...........................................................................................................................13-14 Generating Artwork...................................................................................................................13-15 Artwork Parameters ............................................................................................................13-16 The Aperture File ................................................................................................................13-18 Film Control..............................................................................................................................13-20 Film Options........................................................................................................................13-21 Adding a Photoplot Outline .......................................................................................................13-23 Table of Contents Allegro PCB Editor February 1, 2008 Allegro PCB Editor xi Generating Gerber Files.............................................................................................................13-24 Viewing Gerber Files ..........................................................................................................13-25 Labs ..........................................................................................................................................13-26 Lab 13-3:Creating Artwork Files..............................................................................................13-27 Lab 13-4:Viewing Gerber Files ................................................................................................13-34 Creating Fabrication Drawings..................................................................................................13-36 Drill Symbols and Legend Table ........................................................................................13-37 Drill Customization Spreadsheet ...............................................................................................13-38 Generating an NC Drill File ......................................................................................................13-40 Creating the Parameters File ...............................................................................................13-41 Creating Assembly Drawings....................................................................................................13-43 Labs ..........................................................................................................................................13-44 Lab 13-5:Creating a Drill Legend.............................................................................................13-45 Lab 13-6:Creating Fab and Assembly Drawings......................................................................13-47 Lab 13-7:Creating an NCDRILL File.......................................................................................13-49 |
|
相关推荐
3 个讨论
|
|
5663 浏览 1 评论
分享资深硬件工程师用cadence仿真DDR3 SDRAM视频---- sigxplorer信号完整性仿真例子 ...
79017 浏览 323 评论
5586 浏览 1 评论
32511 浏览 2 评论
李增老师:Cadence Allegro 17.2 如何制作逼真的3D PCB模型和进行3D设计检查
15832 浏览 11 评论
小黑屋| 手机版| Archiver| 电子发烧友 ( 湘ICP备2023018690号 )
GMT+8, 2024-12-31 01:21 , Processed in 0.702518 second(s), Total 70, Slave 53 queries .
Powered by 电子发烧友网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
电子发烧友观察
版权所有 © 湖南华秋数字科技有限公司
电子发烧友 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号