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我在一个项目中使用了ADSP-21479 100pin 管教的芯片，在参照手册做了一个板子，现在也没找到关于这个的一些软硬件资料！软件写了个测试的！但每次下载后就自动运行了！也跳不到main 处！并且下载后看不到 setp over F10 ！想请问一下！有无参考的例程 ！和硬件资料！ 以下是我的测试代码！软件环境VDSP5.1 ！ 想请专家们帮我看看，是什么问题！ 谢谢！ debugNWC 其他选项是默认的！ 硬件 boot cfg 是spi flash ! clk _cfg 8:1 /***************************************************************************** * 21479 TEST.c *****************************************************************************/ #include #include #include #include "cs4272.h" #define NOP asm volatile("nop;") void initPLL_SDRAM(void); void main() { /* Begin adding your custom code here */ initPLL_SDRAM(); //Init_PLL_SDRAM_AMI(); // printf("hello wordn"); InitCS4272(); for (;;) { asm("nop;"); //asm("idle;"); } } void initPLL_SDRAM(){ /********************************************************************************************/ int i, pmctlsetting; // Set INDIV bit in PMCTL register pmctlsetting = *pPMCTL; pmctlsetting |= INDIV; *pPMCTL= pmctlsetting; // Program PLL multiplier to same value as CLK_CFGx pins/previously programmed value in software厖 *pPMCTL = pmctlsetting; // then place PLL in bypass mode pmctlsetting |= PLLBP; *pPMCTL = pmctlsetting; //Wait for recommended number of cycles for (i=0; i<4096; i++) NOP; // Bring PLL out of bypass mode by clearing PLLBP bit *pPMCTL ^= PLLBP; for (i=0; i<16; i++) NOP; pmctlsetting = *pPMCTL; // Clear the previous PLL multiplier pmctlsetting &= ~PLLM63; // Clear the INDIV bit pmctlsetting &= ~INDIV; // or set the INDIV bit // *pMCTL |= INDIV; *pPMCTL= pmctlsetting; // CLKIN = 16.625 MHz, PLLM=32, PLLD = 1, INDIV= 1 => fINPUT = 16.625/2 = 8.3125 MHz // CCLK = 2*PLLM*fINPUT/2*PLLD = (2*32*8.3125)/(2*1) = 266 MHz, SDCLK = CCLK/2 = 133 MHz // VCO frequency = 2*fINPUT*PLLM = 2*8.3125*32 = 532 <= fVCOmax (532 MHz) // CLKIN = 12 MHz, PLLM=32, PLLD = 1, INDIV= 1 => fINPUT = 12/2 = 6 MHz // CCLK = 2*PLLM*fINPUT/2*PLLD = (2*32*6)/(2*1) = 192MHz, SDCLK = CCLK/2 = 133 MHz // VCO frequency = 2*fINPUT*PLLM = 2*6*32 = 384<= fVCOmax (532 MHz) pmctlsetting= SDCKR2|PLLM16|INDIV|DIVEN; *pPMCTL= pmctlsetting; pmctlsetting|= PLLBP; //Setting the Bypass bit pmctlsetting^= DIVEN; //Clearing the DIVEN bit *pPMCTL= pmctlsetting; // Putting the PLL into bypass mode //Wait for around 4096 cycles for the pll to lock. for (i=0; i<5000; i++) NOP; pmctlsetting = *pPMCTL; pmctlsetting ^= PLLBP; //Clear Bypass Mode *pPMCTL = pmctlsetting; //Wait for around 15 cycles for the output dividers to stabilize. for (i=0; i<16; i++) NOP; } #include #include #include "cs4272.h" #ifdef CS4272 #define SPIB_MODE (CPHASE | CLKPL) #define CS4272_CS DS0EN //#define AD1939_CS DS1EN #define SELECT_SPI_SLAVE(select) (*pSPIFLG &= ~(spiselect<<8)) #define DESELECT_SPI_SLAVE(select) (*pSPIFLG |= (spiselect<<8)) // NOTE: To select ADC/DAC Sample Rate of either 48 kHz, 96 kHz or 192 kHz, choose one // of the following 3 macros to set the sample rate (only one at a time). #define USE_48_KHZ_SAMPLE_RATE //#define USE_96_KHZ_SAMPLE_RATE //#define USE_192_KHZ_SAMPLE_RATE /* Setup the SPI parameters here in a buffer first */ /* Setup the SPI parameters here in a buffer first */ unsigned char ConfigParamCS4272[] = { (CS4272_ADDR), MODE_CONTROL_2, MODE_CONTROL_2_PDN | MODE_CONTROL_2_CPEN, (CS4272_ADDR), MODE_CONTROL_1, MODE_CONTROL_ONE_DEFAULT_PAYLOAD, (CS4272_ADDR), DAC_CONTROL, DAC_CONTROL_DEFAULT_PAYLOAD, (CS4272_ADDR), DAC_VOLUME, DAC_VOLUME_DEFAULT_PAYLOAD, (CS4272_ADDR), DAC_VOLUME_A, 0x00, (CS4272_ADDR), DAC_VOLUME_B, 0x00, (CS4272_ADDR), ADC_CONTROL, ADC_CONTROL_DITHER16, (CS4272_ADDR), MODE_CONTROL_2, MODE_CONTROL_2_CPEN, } ; unsigned char CS4272_Regs_Read[sizeof(ConfigParamCS4272) / 3]; volatile int spiFlag ; int LockCount = 0; unsigned int LockTest; void Delay(int i); /////////////////////////////////////////////////////////////////////////////// // Set up the SPI port to access the ADCS4272 // Call with SPI flag to use /////////////////////////////////////////////////////////////////////////////// void SetupSPICS4272(unsigned int SPI_Flag) { // Configure the SPI Control registers // First clear a few registers *pSPICTL = (TXFLSH | RXFLSH) ; *pSPIFLG = 0; // Setup the baud rate to 1MHz *pSPIBAUD = 100; *pSPIBAUD = 25; // Setup the SPI Flag register using the Flag specified in the call *pSPIFLG = (0xF00|SPI_Flag); // Now setup the SPI Control register *pSPICTL = (SPIEN | SPIMS | WL8 | MSBF | TIMOD1 | CPHASE | CLKPL | SMLS|GM); } // Disable the SPI Port void DisableSPICS4272(void) { *pSPICTL = (TXFLSH | RXFLSH); } // Send a word to the CS4272 via SPI Call with the CS4272 address, register address, register data, and SPI flag to use void ConfigureCS4272Register (unsigned char rwaddr,unsigned char regaddr,unsigned char regdata, unsigned int spiselect) { int i,j; unsigned char val[3]; SELECT_SPI_SLAVE(spiselect); val[0]=WR(rwaddr); val[1]=regaddr; val[2]=regdata; for(i=0;i<3;i++) { j=0; *pTXSPI = val ; // Delay(136); //Wait for the SPI to indicate that it has finished. while ((*pSPISTAT & TXS)) {j++;} } j=0; //Wait for the SPI to indicate that it has finished. while (!(*pSPISTAT & SPIFE)) {j++;} Delay(10); DESELECT_SPI_SLAVE(spiselect); } /////////////////////////////////////////////////////////////////////////////// // Receive a register setting from the ADCS4272 // Call with the register address, and SPI flag to use; returns register data /////////////////////////////////////////////////////////////////////////////// unsigned char GetCS4272Register (unsigned char regaddr, unsigned int spiselect) { int i,j; unsigned char val[3]; unsigned int tmp; SELECT_SPI_SLAVE(spiselect); val[0]=RD(CS4272_ADDR ); val[1]=regaddr; val[2]=0; for(i=0;i<3;i++) { j=0; *pTXSPI = val ; //Wait for the SPI to indicate that it has finished. while ((*pSPISTAT & TXS)) {j++;} } j=0; //Wait for the SPI to indicate that it has finished. while (!(*pSPISTAT & SPIF)) {j++;} while (!(*pSPISTAT & SPIFE)) {j++;} Delay(10); tmp = *pRXSPI; DESELECT_SPI_SLAVE(spiselect); return tmp; } /////////////////////////////////////////////////////////////////////////////// // Set up all ADCS4272 registers via SPI /////////////////////////////////////////////////////////////////////////////// void InitCS4272(void) { int configSize = sizeof(ConfigParamCS4272); int i,j=0 ; unsigned char tmpA[sizeof(ConfigParamCS4272) / 3]; //Set up ADCS4272 SetupSPICS4272(CS4272_CS); //Write register settings for(i = 0; i < configSize-6; i+=3) { ConfigureCS4272Register(ConfigParamCS4272, ConfigParamCS4272[i+1], ConfigParamCS4272[i+2], CS4272_CS); Delay(272); //Read back register settings for debugging CS4272_Regs_Read[j++] = GetCS4272Register(ConfigParamCS4272[i+1], CS4272_CS); Delay(272); } // Make sure the PLL is locked before enabling the CODEC. for(i = configSize-6; i < configSize; i+=3) { ConfigureCS4272Register(ConfigParamCS4272, ConfigParamCS4272[i+1], ConfigParamCS4272[i+2], CS4272_CS); Delay(272); //Read back register settings for debugging CS4272_Regs_Read[j++] = GetCS4272Register(ConfigParamCS4272[i+1], CS4272_CS); Delay(272); } DisableSPICS4272(); } #if 0 void enableADCHpf(bool enable) { unsigned char dither16State; if (bridgeADCGainFactor == 0) // if we are going to use bits lower than the 16 MSB, we cannot dither to 16 bits { dither16State = ADC_CONTROL_DITHER16; } else { dither16State = 0; } if (enable) { ConfigureCS4272Register(CS4272_ADDR, ADC_CONTROL, dither16State, CS4272_CS); } else { ConfigureCS4272Register(CS4272_ADDR,ADC_CONTROL, ADC_CONTROL_HPF_DISABLE_B | ADC_CONTROL_HPF_DISABLE_A | dither16State, CS4272_CS); } } #endif //Delay loop void Delay(int i) { for(i ; i > 0; --i) asm("nop;"); } #endif 
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您好，您的问题已经提交给ADI相关专家，将邀请专家尽快回答您的问题。谢谢！
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抱歉，让您久等。关于21479的手册，你可以参看http://www.analog.com/en/processors-dsp/sharc/products/data-sheets/resources/index.html
http://www.analog.com/en/processors-dsp/sharc/processors/manuals/resources/index.html 你的板子不能正常运行代码，可能和你的硬件是否正常工作有关系，你参看上面的资料检查板子的硬件设计。 |
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