本文主要通过一个实例具体介绍ISE中通过编辑UCF文件来对FPGA设计进行约束,主要涉及到的约束包括时钟约束、群组约束、逻辑管脚约束以及物理属性约束。 Xilinx定义了如下几种约束类型: • “Attributes and Constraints” • “CPLD Fitter” • “Grouping Constraints” • “Logical Constraints” • “Physical Constraints” • “Mapping Directives” • “Placement Constraints” • “Routing Directives” • “Synthesis Constraints” • “Timing Constraints” • “Configuration Constraints”