TI论坛
直播中

李桂英

7年用户 1388经验值
私信 关注
[问答]

CC8530+TLV320AIC3101,关闭CC8530发射后,AIC3101无声音输出,但输出底噪变大了,为什么?


  • CC8530+TLV320AIC3101 ,由8530配置AIC3101做输出,上电8530配置3101后输出底噪很小,CC8530配对发射后,声音输出正常,关闭CC8530发射后,AIC3101无声音输出,但输出底噪变大了,必须重新配置AIC3101寄存器底噪才正常,只什么原因????  感觉就是有声音输出过,底噪就变大了,就算没有声音输出底噪也不讳变小,,,下面是8530配置寄存器

    # PIN RESET
    p Reset 0 # Release the reset pin
    d 5000
    p Reset 1 # Release the reset pin
    # RESET
    w 30 00 00 # Select register page 0
    w 30 01 80 # I2C reset
    d 5000
    # DATA PATH
    w 30 07 0A # Left DAC left channel, right DAC right channel
    w 30 09 00 # I2S, 16-bit, continuous clock, no resync
    w 30 1C C0 # Hysteresis is disabled
    w 30 1F C0 # Hysteresis is disabled
    w 30 25 C0 # DAC Power and Output Driver Control Register
    w 30 2B 00 # Left-DAC Digital Volume Control Register
    w 30 2C 00 # Right-DAC Digital Volume Control Register

    # CLOCK SOURCE
    w 30 65 01 # CODEC_CLKIN uses CLKDIV_OUT

    # OUTPUT VOLUME OFFSETS
    w 30 33 5D # HPLOUT mute + power down (weakly driven to common mode)
    w 30 41 5D # HPROUT mute + power down (weakly driven to common mode)
    w 30 3A 5D # HPLCOM mute + power down (weakly driven to common mode)
    w 30 48 5D # HPRCOM mute + power down (weakly driven to common mode)

    w 30 2F 80 # DAC_L1 is routed to HPLOUT, volume = 0 dB
    w 30 36 80 # DAC_L1 is routed to HPLCOM, volume = 0 dB
    w 30 40 80 # DAC_R1 is routed to HPROUT, volume = 0 dB
    w 30 47 80 # DAC_R1 is routed to HPRCOM, volume = 0 dB

    w 30 32 80 ## DAC_R1 is routed to HPLOUT, volume = 0 dB
    w 30 39 80 ## DAC_R1 is routed to HPLCOM, volume = 0 dB
    w 30 3D 80 ## DAC_L1 is routed to HPROUT, volume = 0 dB
    w 30 44 80 ## DAC_L1 is routed to HPRCOM, volume = 0 dB

    w 30 52 80 # DAC_L1 is routed to LEFT_LOP/M, volume = 0 dB
    w 30 5C 80 # DAC_R1 is routed to RIGHT_LOP/M, volume = 0 dB

    w 30 55 80 ## DAC_R1 is routed to LEFT_LOP/M, volume = 0 dB
    w 30 59 80 ## DAC_L1 is routed to RIGHT_LOP/M, volume = 0 dB

    w 30 56 09 # Register 86: LEFT_LOP/M Output Level Control Register
    w 30 5D 09 # Register 93: RIGHT_LOP/M Output Level Control Register

回帖(1)

冬妮

2024-10-12 15:55:50
关闭CC8530发射后,您有没有power down 或mute掉Left-DAC和Right-DAC ?
举报

更多回帖

发帖
×
20
完善资料,
赚取积分