使用Creator可以使用Datapaths移动，处理和输出数据到DAC吗？

对你的问题的简单回答是肯定的，这可以在PSoC Creator中完成。然而，有一个学习曲线和几个步骤来开始你的设计。
开始：“我担心DMA组件只能从ADC寄存器移动到SRAM（CPU可以做整数运算），然后返回到DAC寄存器。”
DMA可用于将数据从任何位置移动到任何其他位置。您可以使用DMA从ADC写入数据到USB、SRAM、DAC，甚至改变PSoC配置寄存器（不推荐）。DMA是非常灵活的，它具有与CPU相同的读/写特权。
是的，DMA向导没有显示所有的可能性，但是所有的可能性都在那里。为了熟悉DMA，我建议阅读AN52505，附录C提供了DMA编程所需的所有重要API，以将数据从一个位置移动到另一个位置。
第二：“我想使用ALU和寄存器在数据通道中进行整数数学运算，并使用PLD逻辑来实现机器状态。”
这是非常有可能的。第一步是学习如何创建和编程数字组件，特别是数据路径。数据路径通过一个称为数据路径配置工具的单独工具编程。要了解这个过程，我强烈推荐观看以下培训：PSoC Creator 110, 111, 112，113, 210, 211，212, 213，和214。这些培训可以在以下链接中找到：
HTTP://www. CyPress？COM/？ID＝1162和页＝1
在PSoC Creator的安装中也包含了一个名为“组件开发工具包”的文件夹，在这个文件夹中你可以找到数据路径配置工具。还有一个叫做“组件作者指南”的文档，这是关于如何创建自己的数据路径组件的另一个很好的信息来源。在数据通路的信息可以在附录B第3.5.2和发现
数据通路有八独特的功能：添加、减、公司、DEC、通、异或、或、与。它还具有转移结果的能力。如果你想做一个多数据通路并没有原生的乘法指令，但你可以创建一个使用移位和加。
所以，这是唯一可能通过设计师而不是Creator？我觉得是这样，因为这是我的理解，Verilog代码只能用于从PLD逻辑创建组件。
如果我理解你的正确设计可以很容易地利用PSoC Creator实现此功能。Verilog代码只使用PLD逻辑是正确的。然而，利用以上信息你可以结合你的Verilog代码和数据创建一个独特而复杂的组件来完成你的目标。



     以下为原文
  The simple answer to your question is yes this can be done in PSoC Creator. However, there is a learning curve and several steps to start doing your design.
    To start: “ My concern is that the DMA components are only able to move from the ADC registers, to SRAM (where the CPU can do integer math), and then back to the DAC register.”    
 
    The DMA can be used to move data from any location to any other location. You can use the DMA to write data from the ADC to USB, SRAM, DACs, or even change PSoC Configuration registers (not recommended). The DMA is very flexible it has the same read/write privileges as the CPU.
    Yes, the DMA wizard doesn’t show all of the possibilities, but all of the possibilities are there. To get familiar with DMA I recommend reading AN52705, appendix C provides all the important API you need to program the DMA to move data from one location to another.
    Second: “ I'd like to use the ALUs and registers in the Datapaths to do the integer math manipulation, and to use the PLD logic for the machine states.”       

     
    This is very possible. The first step is to learn about how to create and program digital components specifically the datapath. The datapath is programmed via a separate tool known as the datapath configuration tool. To learn about this process I highly recommend viewing the following trainings: PSoC Creator 110, 111, 112, 113, 210, 211, 212, 213, & 214. These trainings can be found at the following link:       

    http://www.cypress.com/?id=1162&page=1       

     
    Also included with your install of PSoC Creator is a folder called “Component Development Kit” in this you will find the Datapath Configuration Tool. Also there is a document called the “Component Author Guide” this is another good source of information on how to create your own datapath components. Information on the datapaths can be found in section 4.3.5.2 and in Appendix B.       

     
    The datapath has 8 unique functions: Add, Subtract, Inc, Dec, Pass, XOR, OR, AND. It also has the ability to shift the results. If you are looking to do a multiply the Datapath does not have a native multiply instruction, but you can create one using shifts and adds.       

     
    So, is this only possible through Designer rather than Creator? I get the feeling this is so, since it is my understanding that the Verilog code can only be used to create components out of the PLD logic.       

    If I understand your design correctly you can easily implement this functionality using PSoC Creator. You are correct that Verilog Code will only use PLD logic. However, using the information above you can combine your verilog code and a datapath to create a unique and complex component to accomplish your goals.

TDU：感谢快速和翔实的答复。
我想我会再进一步问一下DMA是否可以用Verilog或DATAPHATE工具把数据移动到我创建的寄存器中？如果是，我如何指定传输位置？将创建一个地址，如果它是一个外部ROM，并使用一个和掩码和一个小的胶水逻辑来实现一个“滚你自己”的寄存器？
谢谢。



     以下为原文
  Tdu: thanks for the quick and informative reply.
    I guess I'll go one step further, and ask if the DMA can move data to a register that I create using the Verilog or Datapath tools? If so, how do I specify the transfer location? Would I create an address as if it were an external ROM and use an AND mask and a little glue logic to implement a "roll your own" register?
    Thanks.

可以将DMA映射到控制寄存器或数据路径。您可以从状态寄存器或数据路径中获得DMA。在数据路径的情况下，有可以读取和写入的寄存器（数据寄存器），但典型的DMA是使用FIFO来完成的。不能直接在PLD中触发器。
所有这些位置都有位置，它们都是内存映射的。没有额外的逻辑来包含。它们将被放置的确切位置将取决于设计如何映射到硬件。这是由生成工具处理的，这些工具将为您将使用的每个寄存器创建γ定义。然后这些定义将这些映射到物理地址。如果您查看作为任何生成的一部分生成的CyFielt.h文件，您将看到我所引用的定义。作为一个例子，我提出了一个简单的基于UDB的计数器，然后当我查看CyFielt.h文件时，我可以看到数据路径FIFO可以使用：
定义了反Ord1BurdBuSc8Audp0U0xF0YRG CyReGeB1UDB09YF0
寄存器由这个定义映射到UDB09中的特定F0寄存器。所有这些都在组件作者指南中描述，并涵盖在TDU指出的培训课程中。你对PSoC设计师做了评论。该产品是PSoC 1的开发平台，PSoC Creator是PSoC 3和PSoC 5的开发平台。你描述想要做音频效果。这将是UDB数据通路的一个挑战。我预计，这些效果将需要乘法和更多的计算比可能是数据通路。这些声音听起来可能更适合数字滤波器块（DFB）。在PSoC有很多不同的计算可能性。我有没有CPU交互UDB中做了一个简单的音频效果。我实现了一个USB用于I2S流音频播放，UDB中被用来控制音量。CPU是用来应对CapSense滑块输入量和期望值写入数据通路控制缩放，但CPU不接触数据。这都是通过DMA移动的。这是通过使用多用移位和加法。因此，可以使用数据通道来进行一些处理。这当然是可能的规模和使用相结合的信号通路。我不知道究竟要实现你想要的效果。你也可以参考我的博客：www.cypress.com/go/psocsensei具有DMA和数据通路的一些有益的探讨。- Brad Budlong



     以下为原文
  You can DMA to either Control registers or the datapath.  You can DMA from either a status register or the datapath.  In the case of the datapath there are registers that you can read and write (data registers) but the typical DMA is done using the FIFOs.  You cannot DMA directly to Flip-Flops in the PLD.
    All of these locations have locations and they are all memory mapped.  There is no additional logic for you to include.  The exact location that they will be placed will vary depending on the how the design is mapped to the hardware.  This is handled by the build tools which will create #defines for each of these registers that you will use.  Then these #defines map these to the physical addresses.  If you look at the file cyfitter.h that is generated as part of any build you will see the defines that I'm refering to.  As an example I put a simple UDB based counter and then when I look at the cyfitter.h file I can see that the datapath FIFO FO can be referenced using:
     
    #define Counter_1_CounterUDB_sC8_counterdp_u0__F0_REG CYREG_B1_UDB09_F0
        The register is mapped by this define to a specific F0 register in UDB09.   
            
        All this is described in the Component Author guide and covered in the training classes that TDU pointed you to.   
            
        You made a comment about PSoC Designer.  That product is the development platform for PSoC 1 and PSoC Creator is the development platform for PSoC 3 and PSoC 5.   
            
        You describe wanting to do audio effects.  That will be a challenge for the UDB datapaths.  I would expect that those effects will require multiplies and more computation than is going to be possible with the datapaths.  These sound like they may be a better fit for the Digital Filter Block (DFB).  There are a lot of different possibilities for computation in PSoC.  I have done a simple audio effect with the UDBs without CPU interaction.  I implemented a USB to UDB to I2S flow for audio playout where the UDBs were used to control the volume.  The CPU was just used to respond to a Capsense slider to input the volume desired and write a value to the datapath to control the scaling, but the CPU never touches the data.  That is all moved via DMA.  This is done using a multiply implemented using shifts and adds.  So some processing can be done using the datapaths.  It is certainly possible to scale and combine signals using the datapath.  I don't know exactly what will be required to implement the effects that you desire.   
            
        You can also refer to my blog:  www.cypress.com/go/psocsensei   
            
        It has some useful discussion of DMA and Datapaths.   
            
         - Brad Budlong