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[问答]

电气厚度为什么建议降低介电常数?

在模拟我的设计基板时,我收到以下警告:在最高模拟频率下找到具有大电气厚度的层!
层厚度= 10 mm,介电常数= 81结果: - 基板数据库生成可能不会收敛。
考虑: - 降低层的厚度;
- 降低层的介电常数 - 降低最大频率。
为什么会出现这个问题
较低的电介质导致更高的波长或电气厚度。
为什么建议降低介电常数?
任何人都可以告诉我这个警告的科学原因吗?编辑:m01tab4于2013年12月16日下午1:09

以上来自于谷歌翻译


     以下为原文

  In simulating the substrate of my design, I get the following warning :

Layer found with a large electrical thickness at the highest simulation frequency!
Layer thickness = 10 mm, dielectric constant = 81

Consequence  : - substrate database generation may not converge.

Consider     : - lowering the thickness of the layer ;
               - lowering the dielectric constant of the layer
               - lowering the maximum freqency.

Why this problem happened? The lower dielectric leads to higher wave length or electrical thickness i guess. Why it suggest to reduce the dielectric constant? can any one please explian me the scientific reason of this warning?

Edited by: m01tab4 on Dec 16, 2013 1:09 PM  

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罗红

2019-1-29 10:06:10
从工具的角度来看,你要求它做一些不是现实生活或现实生活的事情。
诸如FR-4(或其他物质)的常规基底可以薄至400um并且厚至6.35mm。
在你的情况下,你要求模拟10毫米的厚度,这是不现实的。
在10mm处没有迹线会有一个参考平面作为微带线,例如,因为你太遥远了。
典型的厚度可以是几微米到几毫米,但不是一个数量级。
我个人从未见过厚厚的基材。
请更具体地说明您要做的事情,也许其他人可能会帮助您。

以上来自于谷歌翻译


     以下为原文

  From the tool perspective you are asking it to do something that is not real life nor realistic.  A regular substrate such as FR-4 (or others for that matter) can be as thin as 400um and as thick as 6.35mm.  In your case you are asking to model a thickness 10mm which is not realistic I think.  At 10mm no trace will have a reference plane to be a microstrip for example since you would be too far away.

Typical thickness can be few microns to few mm but not one order of magnitude.  I personally have never seen a substrate that thick.

Please be more specific in what you are trying to do and maybe other people might be able to help you.
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