5502-300MHZ其McBSP最大可接收多少MHZ的频率？

请参考手册5.15 Multichannel Buffered Serial Port (McBSP) Timings
参数M1或者M11
Min=2P
P = (Divider2 Ratio)/(CPU Clock Frequency) in ns. For example, when running parts at 300 MHz with the slow peripheral domain at 1/2
the CPU clock frequency, use P = 2/300 MHz = 6.66 ns.
                                                                         http://processors.wiki.ti.com/index.php/Main_Page
Think Over Before Asking.
http://www.catb.org/~esr/faqs/smart-questions.html#goal

那是不是可以这样理解？  Divider2 Ratio 设为1     那么Min=6.66ns    也就是说频率最高在150MHZ

参考芯片手册table 3-11，sysclk2的最高频率为sysclk1, max sysclk1为150MHz，所以不用将Divider2 Ratio 设为1，这样算来，McBSP的最高时钟为75MHz.
                                                                         http://processors.wiki.ti.com/index.php/Main_Page
Think Over Before Asking.
http://www.catb.org/~esr/faqs/smart-questions.html#goal