你好布鲁诺,
你启用了注册表吗?
信号处理扩展/嵌入式浮点状态和
控制寄存器(SPEFSCR)5
(37)
FDBZH嵌入式浮点除以零高
当浮点除法指令以高电平执行时,FDBZH位设置为1
元素除数为0,高元素除数是有限的非零数。 FDBZH是
由标量浮点指令清除。 ?最好的祝福
二万
以上来自于谷歌翻译
以下为原文
Hello Bruno ,
Did you enable the register
Signal Processing Extension/Embedded Floating-Point Status and
Control Register (SPEFSCR)5
(37)
FDBZH Embedded Floating-point Divide by Zero High
The FDBZH bit is set to 1 when a floating-point divide instruction executed with a high
element divisor of 0, and the high element dividend is a finite non-zero number. FDBZH is
cleared by a scalar floating point instruction. ? Best regards
Erwan
你好布鲁诺,
你启用了注册表吗?
信号处理扩展/嵌入式浮点状态和
控制寄存器(SPEFSCR)5
(37)
FDBZH嵌入式浮点除以零高
当浮点除法指令以高电平执行时,FDBZH位设置为1
元素除数为0,高元素除数是有限的非零数。 FDBZH是
由标量浮点指令清除。 ?最好的祝福
二万
以上来自于谷歌翻译
以下为原文
Hello Bruno ,
Did you enable the register
Signal Processing Extension/Embedded Floating-Point Status and
Control Register (SPEFSCR)5
(37)
FDBZH Embedded Floating-point Divide by Zero High
The FDBZH bit is set to 1 when a floating-point divide instruction executed with a high
element divisor of 0, and the high element dividend is a finite non-zero number. FDBZH is
cleared by a scalar floating point instruction. ? Best regards
Erwan
举报