让我更详细地说明我的方法。我在MCC中配置了所有的4CLC。它用一些其他配置文件生成了CL.H和CLC。我不希望那些CLC总是输出。我想在我的Meal.C程序中设置一些特定的条件来初始化它们。我想启用一个或多个。我检查了Microchip开发者帮助站点并在CLC ReavestStpP://MicroChIPDeavic.com上找到了有趣的信息:CcChanType这个部分:LCXEN—CLC模块启用位(1—CLC on,0关)LCXOE -输出使能位(1 -启用,0 -禁用)和ALSO ththtp://MyCHIPCDeave/COM/8BIT:CTCCONBIT 7LCXEN:可配置逻辑单元使能BIT1=可配置逻辑单元启用,混合输入信令0=可配置逻辑单元被禁用,并具有逻辑零输出位6LCXEOE:可配置逻辑单元输出使能BIT1=可配置逻辑CEnter端口引脚输出0=可配置逻辑单元端口引脚输出禁用我可以控制这些寄存器在我的主C程序吗?看看MCC生成的文件,似乎CLC都被自动内化了。有人能给我一个例子吗?
以上来自于百度翻译
以下为原文
Let me be more specific on my means.
I've configured all the 4CLC in MCC.
It generated some clc.h and clc.c, with some other config files.
I dont want those CLC to be always outputing.
I'd like to put some specific conditions in my main.c program to initialize them.
I would like to enable one or more of them with a if() {}; function.
I've check the microchip developer help site and found interesting infos on the CLC registers
http://microchipdeveloper.com/8bit:clc
specialy this part:
LCxEN – CLC module enable bit (1 - CLC On, 0 - Off )
LCxOE – Output enable bit (1 – Enable, 0 – Disable)
and also this
http://microchipdeveloper.com/8bit:clccon
bit 7
LCxEN: Configurable Logic Cell Enable bit
1 = Configurable logic cell is enabled and mixing input signals
0 = Configurable logic cell is disabled and has logic zero output
bit 6
LCxEOE: Configurable Logic Cell Output Enable bit
1 = Configurable logic cell port pin output enabled
0 = Configurable logic cell port pin output disabled
Can I control these registers in my main.c program?
Looking at the MCC generated files it seems the CLC are all internalized automatically.
Can someone give me an example of how it would like in the main.c program
Thanks
让我更详细地说明我的方法。我在MCC中配置了所有的4CLC。它用一些其他配置文件生成了CL.H和CLC。我不希望那些CLC总是输出。我想在我的Meal.C程序中设置一些特定的条件来初始化它们。我想启用一个或多个。我检查了Microchip开发者帮助站点并在CLC ReavestStpP://MicroChIPDeavic.com上找到了有趣的信息:CcChanType这个部分:LCXEN—CLC模块启用位(1—CLC on,0关)LCXOE -输出使能位(1 -启用,0 -禁用)和ALSO ththtp://MyCHIPCDeave/COM/8BIT:CTCCONBIT 7LCXEN:可配置逻辑单元使能BIT1=可配置逻辑单元启用,混合输入信令0=可配置逻辑单元被禁用,并具有逻辑零输出位6LCXEOE:可配置逻辑单元输出使能BIT1=可配置逻辑CEnter端口引脚输出0=可配置逻辑单元端口引脚输出禁用我可以控制这些寄存器在我的主C程序吗?看看MCC生成的文件,似乎CLC都被自动内化了。有人能给我一个例子吗?
以上来自于百度翻译
以下为原文
Let me be more specific on my means.
I've configured all the 4CLC in MCC.
It generated some clc.h and clc.c, with some other config files.
I dont want those CLC to be always outputing.
I'd like to put some specific conditions in my main.c program to initialize them.
I would like to enable one or more of them with a if() {}; function.
I've check the microchip developer help site and found interesting infos on the CLC registers
http://microchipdeveloper.com/8bit:clc
specialy this part:
LCxEN – CLC module enable bit (1 - CLC On, 0 - Off )
LCxOE – Output enable bit (1 – Enable, 0 – Disable)
and also this
http://microchipdeveloper.com/8bit:clccon
bit 7
LCxEN: Configurable Logic Cell Enable bit
1 = Configurable logic cell is enabled and mixing input signals
0 = Configurable logic cell is disabled and has logic zero output
bit 6
LCxEOE: Configurable Logic Cell Output Enable bit
1 = Configurable logic cell port pin output enabled
0 = Configurable logic cell port pin output disabled
Can I control these registers in my main.c program?
Looking at the MCC generated files it seems the CLC are all internalized automatically.
Can someone give me an example of how it would like in the main.c program
Thanks
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