Will_Wu,
可以考虑使用DRG模式来进行线性频率扫描。需要设置频率步进，频率步进速率，上频率限制，下频率限制，请参考数据手册DRG章节。
DRG (Digital Ramp Generator)
DRG can control frequency, or amplitude, or phase sweep.
9 Control bits, 2 64-bit Registers, 1 32-bit registers and 3 Pins are used to contorl DRG
9 Control bits
Digital Ramp Destination Bit: CFR2[21:20] specify which parameter will be controled: frequency, amplitude, or phase
Digital Ramp Enable
Digital Ramp No-Dwell
DROVER PIN active
Load LRR @ IO_Update
Clear Digital Ramp Accumulator
Auto Clear Digital Ramp Accumulator
2 64-bit Registers
Digital Ramp Limit Low Register 32 bits
Digital Ramp Limit High Register 32 bits
Incremental Step Size Register 32 bits
Decremental Step Size Register 32 bits
1 32-bit registers
Positive Slope Rate Register 16 bits
Negative Slope Rate Register 16 bits
3 Pins are used to contorl DRG
DRCTL PIN 62
DRHOLD PIN 63
DROVER PIN 61
Will_Wu,
可以考虑使用DRG模式来进行线性频率扫描。需要设置频率步进，频率步进速率，上频率限制，下频率限制，请参考数据手册DRG章节。
DRG (Digital Ramp Generator)
DRG can control frequency, or amplitude, or phase sweep.
9 Control bits, 2 64-bit Registers, 1 32-bit registers and 3 Pins are used to contorl DRG
9 Control bits
Digital Ramp Destination Bit: CFR2[21:20] specify which parameter will be controled: frequency, amplitude, or phase
Digital Ramp Enable
Digital Ramp No-Dwell
DROVER PIN active
Load LRR @ IO_Update
Clear Digital Ramp Accumulator
Auto Clear Digital Ramp Accumulator
2 64-bit Registers
Digital Ramp Limit Low Register 32 bits
Digital Ramp Limit High Register 32 bits
Incremental Step Size Register 32 bits
Decremental Step Size Register 32 bits
1 32-bit registers
Positive Slope Rate Register 16 bits
Negative Slope Rate Register 16 bits
3 Pins are used to contorl DRG
DRCTL PIN 62
DRHOLD PIN 63
DROVER PIN 61
举报
