----------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity Second is
port (clk,en,res,add,sub:in std_logic;----en使能,res清零,add加,sub减，co进位
sec0,sec1:out std_logic_vector(3 downto 0);
co :out std_logic);
end Second;
architecture sec of Second is
begin
process(clk,en,res,add,sub)
variable s0,s1:std_logic_vector(3 downto 0):="0000";
begin
if rising_edge (clk) then
s1:=s1+1; s0:=s0+1;
end if;
sec1<=s1;
sec0<=s0;
end process;
end sec;
----------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity l222 is
port
(
Clk:in STD_LOGIC;--输入1khz时钟
Rst:in STD_LOGIC;--复位信号
Data:inout STD_LOGIC_VECTOR(7 downto 0);--LCD数据总线
LCDRst,EN,RW,RS:out STD_LOGIC;--LCD控制信号
LED:out STD_LOGIC;
sec0,sec1,min0,min1,hour0,hour1,day0,day1,mon0,mon1,year0,year1,year2,year3,week:in STD_LOGIC_VECTOR(3 downto 0)
);
end l222;
architecture behave of l222 is
signal DClk:STD_LOGIC;
signal pLED:STD_LOGIC;
-
------
begin
------------------------------
LCDRst<='1';
LED<=pLED;
------------------------------
process(Clk,Rst)
variable Cnt:INTEGER range 0 to 500;
variable a: integer range 0 to 4:=0;
variable q: integer range 0 to 20:=1;
variable p: integer range 0 to 31:=0;
variable c: integer range 1 to 16:=1;
variable b: integer range 1 to 16:=1;
variable d: integer range 1 to 16:=1;
begin
if (Rst='0') then
EN<='0';
RW<='1';
RS<='0';
Cnt:=0;
pLED<='0';
elsif rising_edge (Clk) then
Cnt:=Cnt+1;
if Cnt=41 then
p:=1;
elsif Cnt>41 then
p:=p+1;
if p=11 then p:=1;
end if;
end if;
case Cnt is
when 1 => RS<='0';--指令
when 2 => RW<='0';--写
when 3 => EN<='0';
when 4 => Data<=X"30";--基本指令集
when 6 => EN<='1';
when 8 => EN<='0';
when 9 => RW<='1';
when 10 => RS<='0';
when 11 => RS<='0';--指令
when 12 => RW<='0';--写
when 13 => EN<='0';
when 14 => Data<=X"01";--清屏
when 16 => EN<='1';
when 18 => EN<='0';
when 19 => RW<='1';
when 20 => RS<='0';
when 31 => RS<='0';--指令
when 32 => RW<='0';--写
when 33 => EN<='0';
when 34 => Data<=X"0C";--开显示
when 36 => EN<='1';
when 38 => EN<='0';
when 39 => RW<='1';
when 40 => RS<='0';
--when 41 to 190 =>----
-- if p=1 then
-- if a=0 then RS<='0';
-- elsif a=1 or a=2 then RS<='1';
-- end if;
--elsif p=2 then RW<='0';
--elsif p=3 then EN<='0';
-- elsif p=4 then Data<=aaa(c); c:=c+1;
-- elsif p=6 then EN<='1';
-- elsif p=7 then EN<='0';
-- elsif p=8 then RW<='1';
-- elsif p=9 then RS<='0'; a:=a+1;
-- if a=3 then a:=0;
-- end if;
--end if;
----------------------------------------------------------------------------------年------------------
when 201 => RS<='0';--指令
when 202 => RW<='0';--写
when 203 => EN<='0';
when 204 => Data<=X"80";-
when 206 => EN<='1';
when 208 => EN<='0';
when 209 => RW<='1';
when 210 => RS<='0';
when 211 => RS<='1';--指令
when 212 => RW<='0';--写
when 213 => EN<='0';
when 214 =>
case sec1 is
when "0000" => Data<=X"31";
when "0001" => Data<=X"31";
when "0010" => Data<=X"32";
when "0011" => Data<=X"33";--
when "0100" => Data<=X"34";
when "0101" => Data<=X"35";
when "0110" => Data<=X"36";
when "0111" => Data<=X"37";
when "1000" => Data<=X"38";
when "1001" => Data<=X"39";
when others => null;
end case;
when 216 => EN<='1';
when 218 => EN<='0';
when 219 => RW<='1';
when 220 => RS<='0';
when 221 => RS<='1';--指令
when 222 => RW<='0';--写
when 223 => EN<='0';
when 224 =>
case sec0 is
when "0000" => Data<=X"30";
when "0001" => Data<=X"31";
when "0010" => Data<=X"32";
when "0011" => Data<=X"33";--
when "0100" => Data<=X"34";
when "0101" => Data<=X"35";
when "0110" => Data<=X"36";
when "0111" => Data<=X"37";
when "1000" => Data<=X"38";
when "1001" => Data<=X"39";
when others => null;
end case;
when 226 => EN<='1';
when 228 => EN<='0';
when 229 => RW<='1';
when 230 => RS<='0';
------------------------------------------------
---------------------------------------------
when 500 => Cnt:=210;pLED<='1';
when others => null;
end case;
end if;
end process;
--------------------------------
end behave;
--------------------------------
应有现象00 01 02 03.。。。。。。。。
可真实现象为00 00 00 00 00
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