PDN design for transceiver (SERDES) FPGA has strict requirements for power supply and requires a clean voltage source. Although low leakage (LDO) linear regulators are usually used in low power applications, this method must carefully isolate the voltage source. In these applications, circuit board designers must fully consider the problem of voltage source isolation and voltage source sharing. When the isolation is high, the number of regulators increases, and too much sharing affects performance.