Digilent的Cora Z7S是围绕Xilinx强大的Zynq 7000S构建的。
Zynq 7000S器件采用单核ARM Cortex™-A9处理器，与28 nm基于Artix®-7的可编程逻辑配合使用（可以考虑将Raspberry Pi与FPGA板结合在一起）。
这种组合使硬件设计人员能够访问Linux和开源工具等软件资源，以及软件设计人员访问硬件配置。
Zynq建筑
Zynq APSoC分为两个不同的子系统：处理系统（PS）和可编程逻辑（PL）。
PL与Xilinx 7系列Artix FPGA几乎完全相同，只是它包含几个专用端口和总线，将它紧密耦合到PS。
PL可以由处理器直接配置，也可以通过JTAG端口配置。
PS由许多组件组成，包括应用处理单元（APU），高级微控制器总线架构（AMBA）互连，DDR3内存控制器和各种外围控制器，其输入和输出多路复用到54个专用引脚（称为多路复用I / O，
或MIO引脚）。
Zynq-7000S的规格如下：
667 MHz单核Cortex-A9处理器
DDR3内存控制器，带8个DMA通道和4个高性能AXI3从端口
高带宽外设控制器：1G以太网，USB 2.0，SDIO
低带宽外设控制器：SPI，UART，CAN，I2C
1 MSPS片内ADC
可从JTAG和microSD卡编程
可编程逻辑等效于Artix-7 FPGA
14,400个查找表（LUT）
28,800个人字拖
225KB Block RAM
2时钟管理瓷砖
Cora Z7S包含哪些内容
Cora Z7S的各种硬件接口，从1 Gbps以太网PHY到模数转换器和通用输入/输出引脚，使其成为开发各种嵌入式应用的理想平台。
小巧的外形和安装孔使Cora Z7可以用作更大解决方案的组件。
板载SD卡插槽，以太网和电源解决方案使Cora Z7可以独立于主机运行。
Cora Z7S可以连接到标准的Arduino屏蔽，以增加扩展功能。
在设计Cora Z7S时要特别小心，以确保它与市场上的大多数Arduino防护罩兼容。
屏蔽连接器有45个引脚连接到FPGA，用于通用数字I / O.
由于FPGA的灵活性，可以将这些引脚用于几乎任何事物，包括数字读/写，SPI连接，UART连接，I2C连接和PWM。
其中六个引脚AN0-AN5也可用作单端模拟输入，输入范围为0 V - 3.3 V，另外六个AN6 - AN11可用作具有输入范围的差分模拟输入对
0 V - 1.0 V.
Cora Z7S顶视图（图片来源：Digilent，Inc。）
软件支持
Cora Z7S与Xilinx Vivado Design Suite完全兼容。
该工具集将FPGA逻辑设计和嵌入式ARM软件开发融合为易于使用的直观设计流程。
它可以用于设计任何复杂的系统，从运行多个服务器应用程序的完整操作系统串联到控制某些LED的简单裸机程序。
对于那些对在设计中使用处理器不感兴趣的人来说，也可以将Zynq APSoC视为独立的FPGA。
Zynq平台非常适合作为嵌入式Linux目标，Cora Z7S也不例外。
为了帮助您入门，有一个PetaLinux项目可以帮助您快速启动并运行Linux系统。
有关更多信息，请参阅Cora Z7资源中心。
以上来自于谷歌翻译
以下为原文
Digilent’s Cora Z7S is built around Xilinx’s powerful Zynq 7000S. The Zynq 7000S device features a single-core ARM Cortex™-A9 processor mated with 28 nm Artix®-7-based programmable logic (think of a Raspberry Pi and an FPGA board mashed together). This combination allows hardware designers to get access to software resources such as Linux and open-sourced tools, and software designers to get access to hardware configuration.
Zynq Architecture
The Zynq APSoC is divided into two distinct subsystems: the Processing System (PS) and the Programmable Logic (PL).
The PL is nearly identical to a Xilinx 7-series Artix FPGA, except that it contains several dedicated ports and buses that tightly couple it to the PS. The PL can be configured either directly by the processor or via the JTAG port. The PS consists of many components, including the Application Processing Unit (APU), Advanced Microcontroller Bus Architecture (AMBA) Interconnect, DDR3 Memory controller, and various peripheral controllers with their inputs and outputs multiplexed to 54 dedicated pins (called multiplexed I/O, or MIO pins).
The specifications for the Zynq-7000S are listed below:
- 667 MHz single-core Cortex-A9 processor
- DDR3 memory controller with 8 DMA channels and 4 High Performance AXI3 Slave ports
- High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
- Low-bandwidth peripheral controllers: SPI, UART, CAN, I2C
- 1 MSPS on-chip ADC
- Programmable from JTAG and microSD card
- Programmable logic equivalent to Artix-7 FPGA
- 14,400 Look-up Tables (LUTs)
- 28,800 Flip Flops
- 225KB Block RAM
- 2 Clock Management Tiles
What is included in Cora Z7S
The Cora Z7S’ wide array of hardware interfaces, from a 1 Gbps Ethernet PHY to analog-to-digital converters and general-purpose input/output pins, make it an ideal platform for the development of a vast variety of embedded applications. The small form factor and mounting holes make the Cora Z7 ready to be used as a component of a larger solution. The on-board SD Card slot, Ethernet, and power solution allow the Cora Z7 to operate independently of a host computer.
The Cora Z7S can be connected to standard Arduino shields to add extended functionality. Special care was taken while designing the Cora Z7S to make sure it is compatible with the majority of Arduino shields on the market. The shield connector has 45 pins connected to the FPGA for general purpose digital I/O. Due to the flexibility of FPGAs, it is possible to use these pins for just about anything including digital read/write, SPI connections, UART connections, I2C connections, and PWM. Six of these pins, AN0 - AN5, can also be used as single-ended analog inputs with an input range of 0 V - 3.3 V, and another six, AN6 - AN11, can be used as differential analog input pairs with an input range of 0 V - 1.0 V.
![]() Cora Z7S top view (Image source: Digilent, Inc.)
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Software Support
The Cora Z7S is fully compatible with Xilinx Vivado Design Suite. This toolset melds FPGA logic design and embedded ARM software development into an easy-to-use, intuitive design flow. It can be used for designing systems of any complexity, from a complete operating system running multiple server applications in tandem, down to a simple bare metal program that controls some LEDs. It is also possible to treat the Zynq APSoC as a standalone FPGA for those not interested in using the processor in their design.
Zynq platforms are well-suited to be embedded Linux targets, and Cora Z7S is no exception. To help you get started, there is a PetaLinux project that will get you up and running with a Linux system quickly. For more information, see the Cora Z7 Resource Center.
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