关于ConceptHDL从原理图导PCB时出错问题？请指教

我用cadence16.5 ConceptHDL设计原理图，完成后道PCB，我使用的Top-down式原理图设计方式
导PCB时提示“Connectitivity server is unable to load design. The .xcon file might be missing or incorrect. Your design needs to be netlisted in 16.4 or later version of Design Entry HDL"

这个是由什么问题导致的？