基于CYT2B7_M4在测试TCPWM0的capture功能，如何设置P12.4为TC0_39_TR1？

我基于CYT2B7_M4在测试TCPWM0的capture功能，例程是TVII_Sample_Driver_Library_7.2.0tviibe1msrcexamplestcpwmcapture，按照例程将P12.4成功修改成TC0_40_TR0复用功能，但是这个PIN也可以配置为TC0_39_TR1，尝试修改为TC0_39_TR1失败，请问该如何修改，修改了main_cm4.c如下代码：
Line28~30
/* Capture Mode Configuration def */
#define TCPWM0_GRPx_CNTx_CAPTURE TCPWM0_GRP0_CNT39//TCPWM0_GRP0_CNT0
#define PCLK_TCPWM0_CLOCKSx_CAPTURE PCLK_TCPWM0_CLOCKS39//PCLK_TCPWM0_CLOCKS0
#define TCPWM_PERI_CLK_DIVIDER_NO_CAPTURE 0u

Line33~35
#define TCPWM_TR_ONE_CNT_INx_PORT GPIO_PRT12//GPIO_PRT6
#define TCPWM_TR_ONE_CNT_INx_PIN 4ul//1u
#define TCPWM_TR_ONE_CNT_INx_MUX P12_4_TCPWM0_TR_ONE_CNT_IN118//P6_1_TCPWM0_TR_ONE_CNT_IN0

Line165~170
cy_stc_sysint_irq_t irq_cfg =
{
    .sysIntsrc=tcpwm_0_interrupts_39_IRQn,//tcpwm_0_interrupts_0_IRQn,
    .intIdx = CPUIntIdx3_IRQn,
    .isEnabled = true,
};