时钟 {当 sai3 和 spdif 有这样的指定时钟父母时:
clk_ext3: clock@4 {
compatible = "fixed-clock";
注册 = <5>;
#clock-cells = <0>;
时钟频率 = <22579200>;
时钟输出名称=“clk_ext3”;
};
};
captina: captina {
compatible = "cp,captina";
#sound-dai-cells = <0>;/* simple-card needs */
clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
时钟名称=“mclk”;
};
sound-captina {
compatible = "simple-audio-card";
simple-audio-card,name = "captina Card";
简单音频卡,格式=“i2s”;
simple-audio-card,frame-master = <&dailink0_master>;
/* 左右声道切换 */
simple-audio-card,frame-inversion;
simple-audio-card,widgets =
"Line", "Line Out Jack",
"Line", "Line In Jack";
simple-audio-card,routing =
"Line Out Jack", "LOUT",
"Line Out Jack", "ROUT",
"LIN", "Line In Jack",
"RIN", "Line In Jack";
dailink0_master: simple-audio-card,cpu {
sound-dai = <&sai3>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};
简单音频卡,编解码器{
sound-dai = <&captina>;
时钟=<&clk IMX8MM_CLK_SAI3_ROOT>;
时钟名称=“mclk”;
};
};
sound-spdif {
compatible = "fsl,imx-audio-spdif";
型号 = “imx-spdif”;
spdif-controller = <&spdif1>;
spdif 输出;
spdif 输入;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
* RXFS 也必须是三态,因为 TXFS 也必须在同一线路上播放
MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0xd6
/* MCLK input from oscillator */
MX8MM_IOMUXC_GPIO1_IO06_CCMSRCGPCMIX_EXT_CLK3 0x00000011
>;
};
&sai3 {
pinctrl-names = "默认";
pinctrl-0 = <&pinctrl_sai3>;
#sound-dai-cells = <0>;/* simple-card needs */
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
指定时钟父母=<&clk IMX8MM_CLK_EXT3>;
分配的时钟速率 = <22579200>;
状态=“好的”;
};
&spdif1 {
pinctrl-names = "
pinctrl-0 = <&pinctrl_spdif1>;
分配时钟=<&clk IMX8MM_CLK_SPDIF1>;
指定时钟父母=<&clk IMX8MM_CLK_EXT3>;
分配的时钟速率 = <22579200>;
clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
<&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY >,
<&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>;
时钟名称=“核心”,“
};
分配时钟父母=<&clk IMX8MM_AUDIO_PLL2_OUT>;系统没有冻结,但它们在 clk_ext3 上不同步
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