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李彬

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[问答]

如何强制定时器ISR立即运行?

假设我启动一个时间为1000的计时器。假设计时器的计数初始化为零,计时器的ISR将从现在开始运行1000个计时器,此后每1000个计时器运行1000个计时器。但实际上我希望ISR立即运行*,然后每1000滴答。将计时器的计数初始化为周期(在这种情况下为1000)是实现此目的的一种安全方法吗?它似乎可以工作,但我担心这种技术不是100%可靠的。另一种方法是将定时器ISR的实现移动到一个函数中,从ISR调用这个函数,并且在启动定时器之后立即调用它,但是出于两个原因我不愿意这样做:1)初始化l调用不会在ISR优先级发生,这可能导致行为差异,并且2)函数足够复杂,编译器不会内联它,所以我会在定时器ISR中引起函数调用开销。实验室编译器?我找不到克里斯

以上来自于百度翻译


      以下为原文

    Suppose I start a timer with a period of 1000. Assuming the timer's count was initialized to zero, The timer's ISR will run 1000 ticks from now, and every 1000 ticks thereafter. But I actually want the ISR to run *immediately*, and every 1000 ticks thereafter. Is initializing the timer's count to the period (1000 in this case) a safe way to accomplish this? It seems to work, but I'm worried that this technique is not 100% reliable.

An alternative would be move the timer ISR's implementation into a function, call this function from the ISR, and also call it immediately after starting the timer, but I'm reluctant to do this for two reasons: 1) the initial call wouldn't occur at ISR priority, which could cause behavioral differences, and 2) the function is complex enough that the compiler won't inline it, so I would incur function call overhead in the timer ISR.

A second question related to this last point: is there a way to force inlining in the MPLABS compiler? I couldn't find one.

Chris

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李子跃

2019-7-29 09:27:43
只需设置中断标志?例如IFS0SET=0x000 010000;关于您的第二个问题:

以上来自于百度翻译


      以下为原文

    Just set the interrupt flag?
e.g. IFS0SET=0x00010000;
 
As to your second question:-
__attribute__((always_inline))
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李维嘉

2019-7-29 09:40:30
这样安全吗?如何将所有可能设置的标志都依赖于优化,也许是免费的VS许可的编译器。

以上来自于百度翻译


      以下为原文

   
 
is that safe?  what about clobbering all the other flags that might be set
 

depends upon optimization and perhaps free vs licensed compiler. 
 
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朱佳婧

2019-7-29 09:57:06
这样安全吗?根据我的经验,xxxSET寄存器的执行几乎等同于OR操作,因此simong123提到的应该是100%有效的,即,除了发送到xxSET寄存器的1之外,不会影响其他ISR标志。

以上来自于百度翻译


      以下为原文

   
 
is that safe?  what about clobbering all the other flags that might be set


The xxxSET registers execute nearly equivalent to an OR operation from my experience, therefore what simong123 mentioned should be 100% valid - i.e. no other ISR flags will be affected other than the 1's sent to the xxxSET register. 
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黄飞高

2019-7-29 10:12:06
是的,只有设置为1的比特才会被设置。xxxCLR只清除设置为1.xxxINV的比特,只反转设置为1.xxxINV的比特。所有SFR占用432位字,其中第一位是基本寄存器,第二位是CLR寄存器,第三位是SET寄存器,第四位是INV寄存器。IFS0 bit.bit不在PIC32上的原子位。在处理器的头文件中,有针对所有位的掩码定义,如果使用的话,可以使代码更清晰地读取。IFS0SET=_IFS0_T1IF_MASK;/Ruben

以上来自于百度翻译


      以下为原文

    Yes, only the bits set to 1 will be set.
xxxCLR clears only the bits set to 1.
xxxINV inverts only the bits set to 1.
 
All SFRs occupy 4 32 bit words, where the first is the base register, the second is the CLR register, the third is the SET register and the fourth is the INV register.
 
These instructions are atomic which IFS0bits.bit is not on a PIC32.
 
In the header file for the processor there are mask defines for all bits which, if used, makes the code clearer to read.
IFS0SET=_IFS0_T1IF_MASK;
 
/Ruben
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