确定给定网络的逻辑方程是什么

你好@ wfjmueller
我假设你要求LUT正在实现并推动翻牌的等式。
给出的是LUT的单元属性
参考附件快照
-Shreyas
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以下为原文

Hi @wfjmueller
I assume you are asking for equation that LUT is implementing and driving the flop with.
it is given is cell properties of the LUT
refer attached snapshot

-Shreyas
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嗨@aher
我确定能做到这一点，做到了。
但这很麻烦，因为下一步是弄清楚什么是驱动LUT的输入引脚，许多手动愚蠢的工作，可以自动化。
我所追求的是一个以pin或net作为输入的函数，并返回类似的输出 
A和B而不是C而不是（D和E而不是F）;
技术上必须做的是
如果给定引脚，则确定连接网
确定网络的驱动程序
当driver是主端口或顺序元素时，返回相应的端口或单元名称
当驱动器为LUT时，从INIT值导出方程，并为每个LUT输入递归重复上述步骤
这样，人们应该能够构建驱动引脚或网络的逻辑的可读描述。
作为命令行工具很好，当集成在GUI中时甚至更好。
有助于更快地了解检查原理图时发生的情况。



以下为原文

Hi @aher
 
sure I can do that, have done that. But it's cumbersome, because next step is to figure out what is driving the input pins of the LUT, lots of manual stupid work, which could be automatized.
 
What I'm after is a function which takes a pin or net as input, and returns an output like
 
   A and B and not C and not (D and E and not F);
 
What it has to do technically is

• if pin given, determine connected net
  
• determine driver for net
  
• when driver is primary port or sequential element, return respective port or cell name
  
• when driver is LUT, derive equation from INIT value, and recursively repeat above steps for each LUT input
  

This way one should be able to build a readable description of the logic driving a pin or net.
 
Nice as command line tool, even nicer when also integrated in the GUI. Would help to understand much faster what is going on when inspecting a schematic.

在xilinx tcl appstore中，有一个“来自路径的verilog结构网表”脚本。
它看起来很复杂，但它可能（或至少是一个起点）你需要什么。
- 如果提供的信息有用，请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。



以下为原文

in the xilinx tcl appstore, there is a "verilog structural netlist from path" script. It looks quite convoluted but it could be (or at least a starting point for) what you need.- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.