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在接口板之后，通道向上取消断言

我已经实现了两个极光8b10b设计，一个用于AC701（GTP），第二个用于PicoZed7030（GTX），两个设计都具有相同的核心规格，例如（线路速率= 3.125 Gbps gt_ref_clk = 156.25 MHz initclk = 125 Mhz）。
当我在AC701或PicoZed 7030上使用SMA电缆环回设计时，两者都可以正常工作。
但是当我将两个板相互连接时，没有断言通道up并且lane_init_sm模块的RXNOtiNTABLE和DISPERR信号正在切换并且数据在两个RX侧传输，而初始化是4a4a和4abc并且在我分析tx和rx信号时接收随机数据
GTP原语
在通过SMA电缆环回时，交替传输和接收4a4a和4abs

以上来自于谷歌翻译


以下为原文

I have implemented two aurora 8b10b designs one for AC701 (GTP) and second for PicoZed7030 (GTX), both design have same core specs e.g (line rate = 3.125 Gbps gt_ref_clk = 156.25 MHz initclk = 125 Mhz ). When i loop back the design using SMA cables on AC701 or PicoZed 7030 then both works fine. But when i interfaced both board with each other there channel up is not asserted and RXNOTINTABLE and DISPERR signals of lane_init_sm module are toggling and data transmitted on both RX sides while initialization is 4a4a and 4abc and receive random data as i analyzed the tx and rx signals of GTP primitive. In loopback through SMA cable both transimit and recieved 4a4a and 4abs alternatively

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2019-4-12 10:00:39
https://forums.xilinx.com/t5/Networking-and-Connectivity/Aurora-channel-down-when-interfacing-AC701-and-PicoZed-7030/m-p/673863/highlight/true#M8906
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以上来自于谷歌翻译


以下为原文

https://forums.xilinx.com/t5/Networking-and-Connectivity/Aurora-channel-down-when-interfacing-AC701-and-PicoZed-7030/m-p/673863/highlight/true#M8906
 
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