设置端点的初始化代码:
无效的用户()
{
EA=0;/ /中断禁用-简化调试和设置时间
IFCONFIG=0xE3;SycDelayle();//内部,48 MHz,同步,从
ReVCTL= 0x03;SycDelay.();
//设置调试端点
EP1OutCFG= 0xB0;SycDelay.();/ /中断
EP1CIFFG=0xB0;SycDelay.();
ReARMEP1();
/init标志。在DOCS/FPGA-CyPACTET.TXT中列出
pFrAGSABA= 0x8C;SycDelay.();
pFrAgCSCD= 0x09;SycDelay.();
//FIFONIOLID= 0x00;SycDelay.();
//设置LED输出,并照亮它
PTCCFG&AMP= ~0x80;
OEC=0x80;
SycDelay.();
PC7=1;
/整理FIFO
//参阅:HTTP//www-RelabalCalp/Cu/EnEnt/Engut/St/6142-2-1.PHP
/CyPress芯片和“全”旗在暖启动时发出
EP2CFG=0xE4;SycDelay.();
EP4CFG=0xA2;SycDelay.();
EP6CFG= 0x00;SycDelay.();
EP8CFG=0x00;SycDelay.();
FiPosie= 0x80;SycDelay.();
FiPosit=0x82.;
FiPosit=0x84. SycDelay.();
FiPosit=0x86.
FiPosit=0x88;SycDelay.();
FiPosie= 0x00;SycDelay.();
OutpkStay= 0x84. SycDelay.();
OutpkStay= 0x84. SycDelay.();
IpkChans= 0x82.;
IpkChans= 0x82.;
EP2FIFOCFG=0x00;SycDelayy(;)/ /以确保它看到0和1的过渡。
EP4FIFOCFG=0x00;SycDelay.();
EP2FIFOCFG=0x0b;SycDelay.();
EP4FIFOCFG=0x11;SycDelay.();
EP2AutoLunh=0x01;SycDelay.();
EP2AutoLeNLL=0x00;SycDelay.();
EA=1;
}
以上来自于百度翻译
以下为原文
My initialisation code for setting endpoints:
void init_user()
{
EA = 0; //Interrupts disabled - simplify debugging and setup times
IFCONFIG = 0xE3; SYNCDELAY(); //internal, 48MHz, SYNC, slave
REVCTL = 0x03; SYNCDELAY();
//Setup debug endpoints
EP1OUTCFG = 0xB0; SYNCDELAY(); //Interrupt
EP1INCFG = 0xB0; SYNCDELAY();
REARMEP1OUT();
//init flags. listed in docs/fpga-cypacket.txt
PINFLAGSAB = 0x8C; SYNCDELAY();
PINFLAGSCD = 0x09; SYNCDELAY();
//FIFOINPOLAR = 0x00; SYNCDELAY();
//Setup LED output, and light it
PORTCCFG &= ~0x80;
OEC |= 0x80;
SYNCDELAY();
PC7 = 1;
//Sort out FIFOs
//see: http://www.embeddedrelated.com/usenet/embedded/show/65142-1.php
//Issue with cypress chip and 'full' flag on a warm start
EP2CFG = 0xE4; SYNCDELAY();
EP4CFG = 0xA2; SYNCDELAY();
EP6CFG = 0x00; SYNCDELAY();
EP8CFG = 0x00; SYNCDELAY();
FIFORESET = 0x80; SYNCDELAY();
FIFORESET = 0x82; SYNCDELAY();
FIFORESET = 0x84; SYNCDELAY();
FIFORESET = 0x86; SYNCDELAY();
FIFORESET = 0x88; SYNCDELAY();
FIFORESET = 0x00; SYNCDELAY();
OUTPKTEND = 0x84; SYNCDELAY();
OUTPKTEND = 0x84; SYNCDELAY();
INPKTEND = 0x82; SYNCDELAY();
INPKTEND = 0x82; SYNCDELAY();
EP2FIFOCFG = 0x00; SYNCDELAY(); //to ensure it sees a 0->1 transition
EP4FIFOCFG = 0x00; SYNCDELAY();
EP2FIFOCFG = 0x0B; SYNCDELAY();
EP4FIFOCFG = 0x11; SYNCDELAY();
EP2AUTOINLENH = 0x01; SYNCDELAY();
EP2AUTOINLENL = 0x00; SYNCDELAY();
EA = 1;
}
设置端点的初始化代码:
无效的用户()
{
EA=0;/ /中断禁用-简化调试和设置时间
IFCONFIG=0xE3;SycDelayle();//内部,48 MHz,同步,从
ReVCTL= 0x03;SycDelay.();
//设置调试端点
EP1OutCFG= 0xB0;SycDelay.();/ /中断
EP1CIFFG=0xB0;SycDelay.();
ReARMEP1();
/init标志。在DOCS/FPGA-CyPACTET.TXT中列出
pFrAGSABA= 0x8C;SycDelay.();
pFrAgCSCD= 0x09;SycDelay.();
//FIFONIOLID= 0x00;SycDelay.();
//设置LED输出,并照亮它
PTCCFG&AMP= ~0x80;
OEC=0x80;
SycDelay.();
PC7=1;
/整理FIFO
//参阅:HTTP//www-RelabalCalp/Cu/EnEnt/Engut/St/6142-2-1.PHP
/CyPress芯片和“全”旗在暖启动时发出
EP2CFG=0xE4;SycDelay.();
EP4CFG=0xA2;SycDelay.();
EP6CFG= 0x00;SycDelay.();
EP8CFG=0x00;SycDelay.();
FiPosie= 0x80;SycDelay.();
FiPosit=0x82.;
FiPosit=0x84. SycDelay.();
FiPosit=0x86.
FiPosit=0x88;SycDelay.();
FiPosie= 0x00;SycDelay.();
OutpkStay= 0x84. SycDelay.();
OutpkStay= 0x84. SycDelay.();
IpkChans= 0x82.;
IpkChans= 0x82.;
EP2FIFOCFG=0x00;SycDelayy(;)/ /以确保它看到0和1的过渡。
EP4FIFOCFG=0x00;SycDelay.();
EP2FIFOCFG=0x0b;SycDelay.();
EP4FIFOCFG=0x11;SycDelay.();
EP2AutoLunh=0x01;SycDelay.();
EP2AutoLeNLL=0x00;SycDelay.();
EA=1;
}
以上来自于百度翻译
以下为原文
My initialisation code for setting endpoints:
void init_user()
{
EA = 0; //Interrupts disabled - simplify debugging and setup times
IFCONFIG = 0xE3; SYNCDELAY(); //internal, 48MHz, SYNC, slave
REVCTL = 0x03; SYNCDELAY();
//Setup debug endpoints
EP1OUTCFG = 0xB0; SYNCDELAY(); //Interrupt
EP1INCFG = 0xB0; SYNCDELAY();
REARMEP1OUT();
//init flags. listed in docs/fpga-cypacket.txt
PINFLAGSAB = 0x8C; SYNCDELAY();
PINFLAGSCD = 0x09; SYNCDELAY();
//FIFOINPOLAR = 0x00; SYNCDELAY();
//Setup LED output, and light it
PORTCCFG &= ~0x80;
OEC |= 0x80;
SYNCDELAY();
PC7 = 1;
//Sort out FIFOs
//see: http://www.embeddedrelated.com/usenet/embedded/show/65142-1.php
//Issue with cypress chip and 'full' flag on a warm start
EP2CFG = 0xE4; SYNCDELAY();
EP4CFG = 0xA2; SYNCDELAY();
EP6CFG = 0x00; SYNCDELAY();
EP8CFG = 0x00; SYNCDELAY();
FIFORESET = 0x80; SYNCDELAY();
FIFORESET = 0x82; SYNCDELAY();
FIFORESET = 0x84; SYNCDELAY();
FIFORESET = 0x86; SYNCDELAY();
FIFORESET = 0x88; SYNCDELAY();
FIFORESET = 0x00; SYNCDELAY();
OUTPKTEND = 0x84; SYNCDELAY();
OUTPKTEND = 0x84; SYNCDELAY();
INPKTEND = 0x82; SYNCDELAY();
INPKTEND = 0x82; SYNCDELAY();
EP2FIFOCFG = 0x00; SYNCDELAY(); //to ensure it sees a 0->1 transition
EP4FIFOCFG = 0x00; SYNCDELAY();
EP2FIFOCFG = 0x0B; SYNCDELAY();
EP4FIFOCFG = 0x11; SYNCDELAY();
EP2AUTOINLENH = 0x01; SYNCDELAY();
EP2AUTOINLENL = 0x00; SYNCDELAY();
EA = 1;
}
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