MZ DA QFP pcb布局如何保持环路在VDDR1V8和VSS1V8中心焊盘之间短路？

我正在构建一个将使用176个QFP版本的DA.板，并不是非常理想地绕过IMO，有人对这些问题有什么建议吗？理想情况下，我希望所有的帽子都在IC旁边。如果微芯片能为BGA启动器套件提供GER或PDF布局，那也不错。（循环=来自CAPS的高频电源循环，无论您称之为什么）1。是否有任何理由不将VDDR接地直接通过接地电阻与接地平面连接？2。如何保持环路在VDDR1V8和VSS1V8中心焊盘之间短路？3。引脚3-4是AVDD，5-6 AVSS，153-156另一双引脚集，因此绕过每个引脚？4。许多位置是VSS、VDDIO、VDDCART集合，那么，在这里，尝试完成循环回到特定的VSS引脚吗？5。引脚165孤儿VDDIO.Y 6。VDR1V8和VDD1V8的100欧姆电感器背后的原因是什么？7。如何管理1.8V电源，接地平面与引线，因为我希望这将工作在4层，但不想妥协，如果EMC不能工作。是的，这是一个问题墙，但没有太多的参考资料。



      以下为原文

    I am building a board that will use the 176 QFP version of the DA.

Pins aren't layed out very ideally for bypass caps IMO, does anyone have any suggestions on these issues?  Ideally, I'd like all the caps on the same side as the IC.  It would also be nice if microchip would provide gerber or pdf layout for the BGA starter kit.

(loop = high frequency power supply circle from the caps, whatever you call this)

#1.  Is there any reason not to connect VDDR Ground directly to the ground plane vs through a resistor?
#2.  How is one supposed to keep the loop short between the VDDR1V8 and the VSS1V8 center pad?
#3.  Pins 3-4 are AVDD, 5-6 AVSS, 153-156 another dual pin set, so bypass each pin?
#4.  Numerous locations are VSS,VDDIO,VDDCORE sets, so what here, try to finish the loop back to that particular VSS pin?
#5.  Pin 165 orphan VDDIO.
#6.  What is the reasoning behind 100 ohm inductors for vddr1v8 and vdd1v8 on the start kit?
#7.  What about managing 1.8v supplies, ground plane vs leads, as I was hoping this would work on 4 layers, but don't want to compromise if EMC won't work.

Yes, this is a wall of questions, but there isn't much reference material on this.