请问AD9954的IO_UPDATE怎么控制？

引用: VERTEX2016 发表于 2019-2-21 10:55
需要注意：1# The I/O UPDATE signal is edge detected to generate a single rising edge clock signal that drives the register bank flops. The I/O UPDATE signal has no constraints on duty cycle. The minimum low time on I/O UPDATE is one SYNC_CLK clock cycle. 2# The I/O UPDATE pin is set up and held arou ...

引用: VERTEX2016 发表于 2019-2-21 10:55
需要注意：1# The I/O UPDATE signal is edge detected to generate a single rising edge clock signal that drives the register bank flops. The I/O UPDATE signal has no constraints on duty cycle. The minimum low time on I/O UPDATE is one SYNC_CLK clock cycle. 2# The I/O UPDATE pin is set up and held arou ...