1.在Verilog / VHDL包装器中实例化LogiCore输出。
启动ISE.3。
运行综合/实现/生成编程文件。我怀疑您需要经过Xilinx提供的一个或多个精细教程...
------------------------------------------“如果它不起作用
模拟，它不会在板上工作。“
以上来自于谷歌翻译
以下为原文
1. Instantialte the LogiCore output in a Verilog/VHDL wrapper.
2. Start ISE.
3. Run Synthesis / Implementation / Generate Programming File.
I suspect that you will need to go through one or more fine tutorials that Xilinx provide...
------------------------------------------
"If it don't work in simulation, it won't work on the board."
1.在Verilog / VHDL包装器中实例化LogiCore输出。
启动ISE.3。
运行综合/实现/生成编程文件。我怀疑您需要经过Xilinx提供的一个或多个精细教程...
------------------------------------------“如果它不起作用
模拟，它不会在板上工作。“
以上来自于谷歌翻译
以下为原文
1. Instantialte the LogiCore output in a Verilog/VHDL wrapper.
2. Start ISE.
3. Run Synthesis / Implementation / Generate Programming File.
I suspect that you will need to go through one or more fine tutorials that Xilinx provide...
------------------------------------------
"If it don't work in simulation, it won't work on the board."
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