CTRL_REG3 - 位分配不清楚
第一个表显示7位, - 表示第8位。这是否意味着I1_CLICK是最重要的一点?
它看起来像STATUS_AUX是STATUS_REG的副本,唯一不同的是XDA现在是1DA,YDA现在是2DA等等。第二个ADC的行为是否与状态相同?
问候,
托德安德森
以上来自于谷歌翻译
以下为原文
CTRL_REG3 - unclear on bit assignments
The first table shows 7 bits and -- for eighth bit. Does that mean that I1_CLICK is the most significant bit?
It also looks like STATUS_AUX is a duplicate of STATUS_REG, and the only thing different is that XDA is now 1DA, YDA is now 2DA, etc. Is the behavior of the second ADC the same with respect to status?
Regards,
Todd Anderson
CTRL_REG3 - 位分配不清楚
第一个表显示7位, - 表示第8位。这是否意味着I1_CLICK是最重要的一点?
它看起来像STATUS_AUX是STATUS_REG的副本,唯一不同的是XDA现在是1DA,YDA现在是2DA等等。第二个ADC的行为是否与状态相同?
问候,
托德安德森
以上来自于谷歌翻译
以下为原文
CTRL_REG3 - unclear on bit assignments
The first table shows 7 bits and -- for eighth bit. Does that mean that I1_CLICK is the most significant bit?
It also looks like STATUS_AUX is a duplicate of STATUS_REG, and the only thing different is that XDA is now 1DA, YDA is now 2DA, etc. Is the behavior of the second ADC the same with respect to status?
Regards,
Todd Anderson
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