怎么指示MAP不要自动将逻辑放在芯片的某个区域

你好@ tia86
你能用PROHIBIT约束来检查吗？
您可以禁止所有网站。
以下AR涵盖了一个示例。
https://www.xilinx.com/support/answers/52912.html
问候
Sikta
在原帖中查看解决方案



以下为原文

Hi @tia86
 
Can you check with PROHIBIT constraint? You can prohibit all the sites.
 
The following AR covers an example.
 
https://www.xilinx.com/support/answers/52912.html
 
Regards
Sikta
View solution in original post

你好@ tia86
你能用PROHIBIT约束来检查吗？
您可以禁止所有网站。
以下AR涵盖了一个示例。
https://www.xilinx.com/support/answers/52912.html
问候
Sikta



以下为原文

Hi @tia86
 
Can you check with PROHIBIT constraint? You can prohibit all the sites.
 
The following AR covers an example.
 
https://www.xilinx.com/support/answers/52912.html
 
Regards
Sikta

你好@ tia86
我认为您可以为这些FPGA站点创建pblock并将EXCLUDE_PLACEMENT属性设置为TRUE，以便该工具不会将其他逻辑放入此pblock中。
将要放置在此FPGA区域中的逻辑分配给pblock。
您还可以使用LOC约束将逻辑约束到pblock中的特定站点。
LOC约束将优先考虑。
希望这可以帮助。
谢谢，迪皮卡.----------------------------------------------
---------------------------------------------- Google之前的问题
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以下为原文

Hi @tia86
 
I think you can create pblock for those FPGA sites and set the EXCLUDE_PLACEMENT property to TRUE so that the tool does not place other logic in to this pblock. Assign the logic which you want to place in this FPGA region to pblock. You can also have LOC constraint to constrain the logic to specific site within pblock. The LOC constraint would take priority. 
 
Hope this helps.
Thanks,
Deepika.
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你好@ tia86
上述帖子对您有帮助吗？
谢谢，迪皮卡.----------------------------------------------
---------------------------------------------- Google之前的问题
张贴。
如果某人的帖子回答了您的问题，请将帖子标记为“接受为解决方案”。
如果你看到一个特别好的和信息丰富的帖子，考虑给它Kudos（左边的明星）



以下为原文

Hi @tia86
 
Are the above posts helpful?
Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)