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[问答]

DIP封装的全速USB是否有时钟速度限制

嗨,我想知道是否有任何时钟速度限制时,使用PIC的一个更大的包。我知道使用全速USB,你需要在48 MHz的时钟部分。如果你看蘸包,3V3USB引脚是从最近的地面0.3’。这会不会引起大量的电压纹波问题,考虑到电源和接地引脚之间的距离,部分电感会看到什么?

以上来自于百度翻译


      以下为原文

    Hi,

I was wondering if there is any clock speed limits on when using PIC's in a larger packages. I know to use full speed u***, you need to clock the part at 48MHz. If you look dip package the 3v3u*** pin is 0.3'' from the nearest ground. Wouldn't this cause a lot of voltage ripple problems, given the inherent inductance the part would see given the distance between the power and ground pins?  

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张丽

2018-11-1 10:37:45
具有USB功能块的DIC封装的PIC器件在封装的中间附近的相邻引脚上具有VDD和VSS。如果你想通过数字和包代码来提及一个特定的PIC部分,也许我们可以提供一个更有用的回复。

以上来自于百度翻译


      以下为原文

    The PIC devices with USB function block in DIP packages seem to have VDD and VSS in adjacent pins near the middle of the package. If you would care to mention a specific PIC part by number and package code perhaps we could offer a more helpful reply.
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夏涌革

2018-11-1 10:55:17
我用PIC16F1455制作了一个FS USB设备,PIC16F1455在引脚1和14上具有电源和接地。它使用内部振荡器,代码来自微芯片MLA演示板。

以上来自于百度翻译


      以下为原文

    I made a FS USB device using a PIC16F1455 which has power and ground on pins 1 and 14. It uses the internal oscillator, and code is from the Microchip MLA demo board.
 

 
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王聪

2018-11-1 11:02:18
嗨,我谈论的部分是PIC16F1459。我所说的引脚间距是在VASB3V3(引脚17)和地之间。我们可以从另一个帖子看出,即使PARF板,人们也能让它工作正常。我只是想了解这些东西的物理限制。我猜它们是包上的一些隐藏的电容,允许它运行。

以上来自于百度翻译


      以下为原文

    Hi,
 
The part I'm talking about is the PIC16f1459. The pin spacing I'm talking about is between Vu***3v3 (pin 17) and ground.  We can see from the other post that people have gotten it to work A OK even with perf-boards. I'm just trying to understand what the physical limitations are on these things. 
 
I'm guessing that their is some hidden capacitance on the package that allows it to operate?  
   Attached Image(s)

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