嗨,我谈论的部分是PIC16F1459。我所说的引脚间距是在VASB3V3(引脚17)和地之间。我们可以从另一个帖子看出,即使PARF板,人们也能让它工作正常。我只是想了解这些东西的物理限制。我猜它们是包上的一些隐藏的电容,允许它运行。
以上来自于百度翻译
以下为原文
Hi,
The part I'm talking about is the PIC16f1459. The pin spacing I'm talking about is between Vu***3v3 (pin 17) and ground. We can see from the other post that people have gotten it to work A OK even with perf-boards. I'm just trying to understand what the physical limitations are on these things.
I'm guessing that their is some hidden capacitance on the package that allows it to operate?
Attached Image(s)

嗨,我谈论的部分是PIC16F1459。我所说的引脚间距是在VASB3V3(引脚17)和地之间。我们可以从另一个帖子看出,即使PARF板,人们也能让它工作正常。我只是想了解这些东西的物理限制。我猜它们是包上的一些隐藏的电容,允许它运行。
以上来自于百度翻译
以下为原文
Hi,
The part I'm talking about is the PIC16f1459. The pin spacing I'm talking about is between Vu***3v3 (pin 17) and ground. We can see from the other post that people have gotten it to work A OK even with perf-boards. I'm just trying to understand what the physical limitations are on these things.
I'm guessing that their is some hidden capacitance on the package that allows it to operate?
Attached Image(s)

举报