嗨,
您可以在HDL中使用USE_DSP48属性来强制在DSP上实现逻辑。
有关约束使用的详细信息,请参阅http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst_v6s6.pdf的第443页。
谢谢,
迪皮卡。
谢谢,迪皮卡.----------------------------------------------
---------------------------------------------- Google之前的问题
张贴。
如果某人的帖子回答了您的问题,请将帖子标记为“接受为解决方案”。
如果你看到一个特别好的和信息丰富的帖子,考虑给它Kudos(左边的明星)
在原帖中查看解决方案
以上来自于谷歌翻译
以下为原文
Hi,
You can use USE_DSP48 attribute in HDL to force implementation of logic on to DSP.
Refer to page-443 of http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst_v6s6.pdf for details on constraint usage.
Thanks,
Deepika.
Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)View solution in original post
嗨,
您可以在HDL中使用USE_DSP48属性来强制在DSP上实现逻辑。
有关约束使用的详细信息,请参阅http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst_v6s6.pdf的第443页。
谢谢,
迪皮卡。
谢谢,迪皮卡.----------------------------------------------
---------------------------------------------- Google之前的问题
张贴。
如果某人的帖子回答了您的问题,请将帖子标记为“接受为解决方案”。
如果你看到一个特别好的和信息丰富的帖子,考虑给它Kudos(左边的明星)
在原帖中查看解决方案
以上来自于谷歌翻译
以下为原文
Hi,
You can use USE_DSP48 attribute in HDL to force implementation of logic on to DSP.
Refer to page-443 of http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst_v6s6.pdf for details on constraint usage.
Thanks,
Deepika.
Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)View solution in original post
举报