One of the most interesting aspects of my job in the protection business unit at ON Semiconductor is representing the company in standards bodies such as the Electrostatic Discharge Association (ESDA), JEDEC and the IEEE Surge Protection Committee. While I started these activities while I was working for AT&T Bell Laboratories and White Mountain Labs my activity has increased since joining ON Semiconductor. One of the “downsides” of this activity is getting asked to do things that you weren’t planning on doing. One of those will be a presentation “Year in Review: System Level Electrostatic Discharge (ESD)” at the upcoming EOS/ESD Symposium, September 7-12 in Tucson, Arizona. It is hard to say no to such an opportunity since a large fraction of ON Semiconductor’s protection business is products to protect systems from ESD. A lot is happening and it has proven to be a good opportunity to reflect.
ESD is a surprisingly severe threat. People and objects charge to thousands of volts during normal activity. The smallest spark that you can feel when you touch a door knob on a dry day means that you were charged to 3000 V and the current peaked at about 2 A. Discharges at higher voltages and from a low resistance path will create much higher currents, 30 A or more. The current does not last long, under 100 ns, but modern integrated circuits designed to work at less than a couple of volts and with feature sizes measured in nm that is enough stress to cause damage. The protection challenge increases with the trend to higher speed interfaces between computers, smart phones, laptops and televisions. High speed interfaces such as HDMI and USB3 require very low parasitics, restricting the size of protection devices that can be used to shunt charge to ground without building up damaging voltages at integrated circuits inputs.
To meet this challenge ON Semiconductor is developing new protection devices with lower turn on voltages and lower dynamic resistance while reducing capacitance to prevent interfering with high frequency data transfer. The rest of the industry is not standing still. One of the interesting trends is a move to simulate system ESD events. Simulation allows board designers to understand how integrated circuits, protection devices, passive components and board parasitics work together. This will require availability of models not only of protection devices but of the integrated circuits being protected beyond their normal range of operation. The ESDA has a working group addressing how the industry can share device models without giving away proprietary information as well as fit the ESD simulation process within the normal simulation of a system’s board. As a key member of this group it is a major effort.
I will be addressing these issues as well as other developments within System Level ESD in my presentation. The EOS/ESD Symposium is also a great place to learn about many aspects of EOS and ESD beyond System Level ESD including on chip ESD protection, ESD testing and factory controls through technical sessions, tutorials, workshops and an equipment exhibition. http://esda.org/symposiaEOS-ESD.html
