“PPS:这是一个非常密集的设计;如果没有放置限制,它甚至不能以10mhz路由。所以可能是我在par工具的预期使用模式之外操作。”
您是否已在MAP阶段实施了所有可用选项以减少逻辑拥塞(例如全局优化,等效寄存器删除等)以帮助在设备中创建一些空间?
您是否以最佳方式使用设备资源(例如,将同步resetFSM移动到本地BRAM而不是在切片中占用LUT等)?
我正在努力缩小从LX45T到LX25T的设计,坦率地说,我正在通过利用Spartan 6架构产生一些惊人的结果(无论如何我都很惊讶)。
如果您还没有,我完全建议您使用UG687 v13.3的大部分内容来帮助优化设计。
问候,
霍华德
----------“我们必须学会做的事情,我们从实践中学习。”
- 亚里士多德
以上来自于谷歌翻译
以下为原文
"PPS: this is an insanely dense design; it won't even route at 10mhz without the placement constraints. So it might be that I'm operating outside the intended usage model for the par tools."
Have you implemented all of the available options at the MAP stage to reduce logic congestion (e.g. global optimisation, equivalent register removal, etc.) to help create some space in the device?
Are you utilising the device resources in the most optimal way (e.g. moving synchronously reset FSMs into local BRAM rather than taking up LUTs in slices, etc.)?
I'm working with shrinking a design from an LX45T to an LX25T and, frankly, I'm producing some amazing results (amazing to me, anyway) by taking advantage of the Spartan 6 architecture.
If you haven't already, I thoroughly recommend working through most sections of UG687 v13.3 to help optimise the design.
Regards,
Howard
----------
"That which we must learn to do, we learn by doing." - Aristotle
“PPS:这是一个非常密集的设计;如果没有放置限制,它甚至不能以10mhz路由。所以可能是我在par工具的预期使用模式之外操作。”
您是否已在MAP阶段实施了所有可用选项以减少逻辑拥塞(例如全局优化,等效寄存器删除等)以帮助在设备中创建一些空间?
您是否以最佳方式使用设备资源(例如,将同步resetFSM移动到本地BRAM而不是在切片中占用LUT等)?
我正在努力缩小从LX45T到LX25T的设计,坦率地说,我正在通过利用Spartan 6架构产生一些惊人的结果(无论如何我都很惊讶)。
如果您还没有,我完全建议您使用UG687 v13.3的大部分内容来帮助优化设计。
问候,
霍华德
----------“我们必须学会做的事情,我们从实践中学习。”
- 亚里士多德
以上来自于谷歌翻译
以下为原文
"PPS: this is an insanely dense design; it won't even route at 10mhz without the placement constraints. So it might be that I'm operating outside the intended usage model for the par tools."
Have you implemented all of the available options at the MAP stage to reduce logic congestion (e.g. global optimisation, equivalent register removal, etc.) to help create some space in the device?
Are you utilising the device resources in the most optimal way (e.g. moving synchronously reset FSMs into local BRAM rather than taking up LUTs in slices, etc.)?
I'm working with shrinking a design from an LX45T to an LX25T and, frankly, I'm producing some amazing results (amazing to me, anyway) by taking advantage of the Spartan 6 architecture.
If you haven't already, I thoroughly recommend working through most sections of UG687 v13.3 to help optimise the design.
Regards,
Howard
----------
"That which we must learn to do, we learn by doing." - Aristotle
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