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周雯葭

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[问答]

AD8330.cir转换为Pspice文件后仍无法仿真

Dear ADI的专家们:
                         我在你们官网下载了AD8330的CIR文件,并按之前熟悉的方式进行文件转换后,Pspice仍然提示Subcircuit AD8330_H1 used by X_U3.X_H1 is undefined,而在Configuration Files中我已经将AD8330.LIB加入进去了的。不知道是什么原因?

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袁飞

2018-9-10 11:22:00
你把网表 贴出来,应该是语法上存在一些错误,导致无法调动子模块
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周雯葭

2018-9-10 11:41:37
引用: 60user105 发表于 2018-9-10 17:36
你把网表 贴出来,应该是语法上存在一些错误,导致无法调动子模块

你好,你说的是AD8330 pspice的模型吗?我用PSpice Model Editor打开后如下:
* AD8330 SPICE Macro-model       
* Description: Amplifier
* Generic Desc: XF02, VGA, 150MHz, 3V, Single
* Developed by:
* Revision History: 08/10/2012 - Updated to new header style
*
* Copyright 2012 by Analog Devices, Inc.
*
* Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spiceModels/license/spice_general.html for License Statement. Use of this model
* indicates your acceptance of the terms and provisions in the License Statement.
*
* BEGIN Notes:
*
* Not Modeled:
*   
* Parameters modeled include:
* END Notes
*
*************
* This model was developed for Analog Devices by:
 
 
* AEI Systems, LLC
* 5777 W. Century Blvd., Suite 876
* Los Angeles, California 90045-5677
*
* The model is ?006, AEi Systems, LLC. All rights reserved.
*
* Users may not directly or indirectly display, re-sell or
* re-distribute this model or any derivative work there from
* without the prior written consent of both AEi Systems and
* Analog Devices. This model is subject to change without
* notice. Neither Analog Devices nor AEi Systems is responsible
* for updating this model.
*
* For more information regarding modeling services, model
* libraries and simulation products, please call AEi Systems
* at (310) 216-1144, or contact AEi Systems by
* email: info@aeng.com. Or visit AEi Systems on the web
* at http://www.AENG.com
 
 
.SUBCKT AD8330 CMGN CMOP CNTR COMM ENBL INHI INLO MODE OFST OPHI OPLO VDBS VMAG
+  VPOS VPSI VPSO 
V_V2         N689226 N685811 0.175
C_C1         COMM INLO  4p 
R_R18         N729515 GAINLO  10K 
R_R1         VDBS COMM  100Meg 
D_D2         INLO VPSI Dbreak
G_G11         VPSO COMM TABLE { V(CNTR2, COMM) }
+ ( (0,0)(2.7,1.48m)(6,1.48m) )
G_G16         VPSO COMM TABLE { V(N712728, OPHI) }
+ ( (-100,-1u)(0,0)(75,1) )
E_LIMIT1         DBS 0 VALUE {LIMIT(V(N642867),0,1.5)}
C_C7         0 N1013152  10p 
R_R23         N1028228 N1013152  1 
R_R13         N829851 OFST  480 
G_G14         VPSO COMM TABLE { V(N897552, COMM) }
+ ( (0,0)(2.7,18.5m)(6,18.5m) )
R_R14         0 N633004  1k 
G_G18         N877957 N1013152 TABLE { V(N877957, N1013152) }
+ ( (-1000,-10n)(0,0)(1m,10m) )
R_R4         INHI N632402  500 
E_E17         N985107 0 GAIN3 0 0.5
E_E13         0 N729515 VALUE {V(N699213,0)+V(COMM,CNTR)}
R_R21         N985107 N699213  1k 
E_E14         LINGAIN2 0 VALUE { if(V(N877957, 0)>0.5,V(LINGAIN),0) }
C_C6         0 N940675  300p 
E_E4         GAIN1 0 VALUE {V(N633004,0)*V(DBSGAIN,0)}
G_G13         COMM CMGN TABLE { V(CNTR2, COMM) }
+ ( (0,0)(2.7,200u)(6,200u) )
E_E12         N707872 0 VALUE {V(N699213,0)+V(CNTR,COMM)}
G_G8         N689651 GAINLO TABLE { V(N689651, GAINLO) }
+ ( (-100,-1n)(0,0)(1m,10m)(2m,1) )
C_C5         0 N699213  0.5p 
R_R17         N707872 GAIN4  10K 
G_G12         COMM VMAG TABLE { V(CNTR2, COMM) }
+ ( (0,0)(2.7,100u)(6,100u) )
L_L2         N6584861 N662042  0.015u 
E_E3         CNTR2 COMM VALUE { if(V(ENBL, COMM)>0.5,V(VPSO),0) }
G_G7         GAINLO N685811 TABLE { V(GAINLO, N685811) }
+ ( (-100,-1n)(0,0)(1m,10m)(2m,1) )
R_R16         N6584861 GAIN3  12.0 
R_R24         OFST COMM  1G 
R_R8         MODE VPOS  1Meg 
R_R6         OPHI N712728  75 
G_G4         MCLAMP GAIN3 TABLE { V(MCLAMP, GAIN3) }
+ ( (-100,-1n)(0,0)(1m,100m) )
E_E11         N695171 0 COMM 0 1
E_E1         N941057 0 N621192 0 1.6667
R_R22         N941057 N940675  1K 
E_E9         MCLAMP 0 0 LINGAIN 2
R_R19         ENBL COMM  1E9 
E_E16         N718317 COMM GAINLO 0 1
E_E20         N818867 COMM CNTR COMM 1.5
V_V4         N818867 N829851 0.75
X_H1    N632402 OFST N633004 N1033056 AD8330_H1
E_E15         N712728 COMM GAIN4 0 1
V_V3         N689651 N695171 0.175
D_D3         COMM INHI Dbreak
G_G3         GAIN3 PCLAMP TABLE { V(GAIN3, PCLAMP) }
+ ( (-100,-1n)(0,0)(1m,100m) )
G_G5         GAIN4 N685811 TABLE { V(GAIN4, N685811) }
+ ( (-100,-1n)(0,0)(1m,10m)(2m,1) )
G_G9         CMOP CNTR CNTR2 CMOP 125u
D_D4         COMM INLO Dbreak
G_G17         VPSO COMM TABLE { V(N718317, OPLO) }
+ ( (-100,-1u)(0,0)(75,1) )
R_R15         OPLO N718317  75 
R_R12         CMOP CNTR  4K 
G_G6         N689651 GAIN4 TABLE { V(N689651, GAIN4) }
+ ( (-100,-1n)(0,0)(1m,10m)(2m,1) )
R_R9         CMGN COMM  1K 
R_R2         COMM VMAG  5K 
E_E6         GAIN2 0 VALUE {V(GAIN1,0)*V(LINGAIN2,0)}
E_E2         N621192 0 VALUE { if(V(MODE, COMM)>=1.5,V(DBS),1.5-V(DBS)) }
X_H2    OFST N632210 N1033056 0 AD8330_H2
E_E18         N642867 0 VALUE {V(VDBS,COMM)+V(COMM,CMGN)}
E_E10         N689226 0 VPSO COMM 1
R_R20         N1013152 N877957  2880 
E_E21         N897552 COMM VALUE { if(V(ENBL, COMM)>2.3,V(VPSO),0) }
E_E8         PCLAMP 0 LINGAIN 0 2
G_G15         N941057 N940675 TABLE { V(N941057, N940675) }
+ ( (-1000,-10n)(0,0)(1m,1000m) )
E_E5         N1028228 0 VALUE { if(V(ENBL, COMM)>2.3,1,0) }
D_D1         INHI VPSI Dbreak
E_E7         LINGAIN 0 TABLE { V(N6574242, 0) }
+ ( (0,0)(0.5,1)(1,1.95)(2,3.7)(3,5.5)(4,7.2)(4.7,8.4)(4.9,8.5)(5,8.5) )
R_R5         INLO N632210  500 
E_ABM1         DBSGAIN 0 VALUE { 10**(V(N940675))    }
C_C2         COMM INHI  4p 
C_C4         0 N877957  100p 
G_G2         GAIN2 N662042 TABLE { V(GAIN2, N662042) }
+ ( (-100,-210m)(-1m,-200m)(0,0)(1m,200m)(100,210m) )
C_C3         0 GAIN3  100p 
G_G10         VPOS COMM TABLE { V(VPOS, COMM) }
+ ( (-100,-1n)(0,0)(2.7,20u)(6,20u) )
E_E19         N6574242 0 VALUE {V(VMAG,COMM)+V(COMM,CMGN)}
.model Dbreak D Is=1e-10 Cjo=.01pF Rs=1m  N=1
.ENDS
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袁飞

2018-9-10 11:51:15
引用: pingfandeshijie 发表于 2018-9-10 17:56
你好,你说的是AD8330 pspice的模型吗?我用PSpice Model Editor打开后如下:
* AD8330 SPICE Macro-model       
* Description: Amplifier

AD8330的子电路没有问题, 最好把你的调用 部分也传上来啊,看看调用语言是否正确
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