引用: vuywsdfwf 发表于 2018-7-30 08:27
ROM bootloader初始化时会enable timer, 在reset EMIF口的同时，也reset了timer, 所以会一直在上面那段读timer寄存器的代码里运行。这个要写二次bootloader来避免。请参考下面的E2E上的帖子。
https://e2e.ti.com/support/dsp/c5000/f/109/p/148852/539641#539641
https://e2e.ti.com/support/dsp/c5000/f/109/p/132583/480 ...
我写过一个二次bootloader，是用C语言写的，仿真的时候后可以正常的引导我烧到mcspi flash中的bin文件，但是我把这个二次bootloader的bin文件烧到nor flash中，然后用ROM的中的bootloader加载二次bootloader再加载mcspi flash中的bin程序就出错了，后来发现是ROM中的bootloader加载二次bootloader后，二次bootloader运行出错，程序一运行到二次bootloader的mcspi初始化程序就会出错，不进行mcspi 初始化程序，二次bootloader可以正常运行，但是由于没有初始化mcspi所以也不会正确加载mcspi中的bin文件，但是二次bootloader确实正确运行起来了。这个很奇怪，我仿真的时候二次bootloader是可以正常工作的，我的mcspi初始化如下：
#define SYS_PRCNTR *(volatile ioport Uint16*)(0x1c04)
#define SYS_PRCNTRLR *(volatile ioport Uint16*)(0x1c05)
#define MCSPI_BASE 0x3400
#define MCSPI_MODULCTRLL *(volatile ioport Uint16*)( MCSPI_BASE + 0x128 )
#define MCSPI_CH0CONFL *(volatile ioport Uint16*)( MCSPI_BASE + 0x12C )
#define MCSPI_CH0CONFU *(volatile ioport Uint16*)( MCSPI_BASE + 0x12D )
void spirom_init( )
[
volatile unsigned int i;
/* Reset SPI */
SYS_PRCNTR = 0x20;
SYS_PRCNTRLR |= 0x0020;
for(i = 0; i < 0x200; i++)
asm(" nop");
/* Configure MCSPI Module */
MCSPI_MODULCTRLL = 0
| ( 0 << 8 ) // Data managed by MCSPI_TX(i) and MCSPI_RX(i) registers
| ( 0 << 7 ) // Multiple word access disabled
| ( 0 << 4 ) // No delay for first spi transfer
| ( 0 << 3 ) // Functional mode
| ( 0 << 2 ) // Master
| ( 0 << 1 ) // SPIEN is used as a chip select
| ( 1 << 0 );// Only one channel will be used in master mode
MCSPI_CH0CONFL = 0
| ( 0 << 15 ) // DMA Read Request disabled
| ( 0 << 14 ) // DMA Write Request disabled
| ( 0 << 12 ) // Transmit and Receive mode
| ( 7 << 7 ) // SPI word length = 8
| ( 1 << 6 ) // SPIEN is held high during the active state
| ( 8 << 2 ) // CLKD = 8 Clock devider
| ( 0 << 1 ) // SPICLK is held high during the active state
| ( 0 << 0 );// Data are latched on even numbered edges of SPICLK
MCSPI_CH0CONFU = 0
| ( 0 << 13 ) // Clock divider granularity of power of two
| ( 1 << 12 ) // The buffer is used to receive data
| ( 1 << 11 ) // The buffer is used to transmit data
| ( 1 << 9 ) // 1.5 cycles between CS toggling and first or last edge of SPI clock
| ( 0 << 8 ) // Start bit polarity
| ( 0 << 7 ) // Disable start bit
| ( 0 << 4 ) // SPIEN active between SPI words
| ( 0 << 3 ) // Turbo is deactivated
| ( 1 << 2 ) // Data Line0 selected for reception
| ( 1 << 1 ) // Data Line1 selected for transmission
| ( 0 << 0 );// No transmission on Data Line0
/* Enable MCSPI channel */
MCSPI_MODULCTRLL = 0x01; // Enable Channel
引用: vuywsdfwf 发表于 2018-7-30 08:27
ROM bootloader初始化时会enable timer, 在reset EMIF口的同时，也reset了timer, 所以会一直在上面那段读timer寄存器的代码里运行。这个要写二次bootloader来避免。请参考下面的E2E上的帖子。
https://e2e.ti.com/support/dsp/c5000/f/109/p/148852/539641#539641
https://e2e.ti.com/support/dsp/c5000/f/109/p/132583/480 ...
我写过一个二次bootloader，是用C语言写的，仿真的时候后可以正常的引导我烧到mcspi flash中的bin文件，但是我把这个二次bootloader的bin文件烧到nor flash中，然后用ROM的中的bootloader加载二次bootloader再加载mcspi flash中的bin程序就出错了，后来发现是ROM中的bootloader加载二次bootloader后，二次bootloader运行出错，程序一运行到二次bootloader的mcspi初始化程序就会出错，不进行mcspi 初始化程序，二次bootloader可以正常运行，但是由于没有初始化mcspi所以也不会正确加载mcspi中的bin文件，但是二次bootloader确实正确运行起来了。这个很奇怪，我仿真的时候二次bootloader是可以正常工作的，我的mcspi初始化如下：
#define SYS_PRCNTR *(volatile ioport Uint16*)(0x1c04)
#define SYS_PRCNTRLR *(volatile ioport Uint16*)(0x1c05)
#define MCSPI_BASE 0x3400
#define MCSPI_MODULCTRLL *(volatile ioport Uint16*)( MCSPI_BASE + 0x128 )
#define MCSPI_CH0CONFL *(volatile ioport Uint16*)( MCSPI_BASE + 0x12C )
#define MCSPI_CH0CONFU *(volatile ioport Uint16*)( MCSPI_BASE + 0x12D )
void spirom_init( )
[
volatile unsigned int i;
/* Reset SPI */
SYS_PRCNTR = 0x20;
SYS_PRCNTRLR |= 0x0020;
for(i = 0; i < 0x200; i++)
asm(" nop");
/* Configure MCSPI Module */
MCSPI_MODULCTRLL = 0
| ( 0 << 8 ) // Data managed by MCSPI_TX(i) and MCSPI_RX(i) registers
| ( 0 << 7 ) // Multiple word access disabled
| ( 0 << 4 ) // No delay for first spi transfer
| ( 0 << 3 ) // Functional mode
| ( 0 << 2 ) // Master
| ( 0 << 1 ) // SPIEN is used as a chip select
| ( 1 << 0 );// Only one channel will be used in master mode
MCSPI_CH0CONFL = 0
| ( 0 << 15 ) // DMA Read Request disabled
| ( 0 << 14 ) // DMA Write Request disabled
| ( 0 << 12 ) // Transmit and Receive mode
| ( 7 << 7 ) // SPI word length = 8
| ( 1 << 6 ) // SPIEN is held high during the active state
| ( 8 << 2 ) // CLKD = 8 Clock devider
| ( 0 << 1 ) // SPICLK is held high during the active state
| ( 0 << 0 );// Data are latched on even numbered edges of SPICLK
MCSPI_CH0CONFU = 0
| ( 0 << 13 ) // Clock divider granularity of power of two
| ( 1 << 12 ) // The buffer is used to receive data
| ( 1 << 11 ) // The buffer is used to transmit data
| ( 1 << 9 ) // 1.5 cycles between CS toggling and first or last edge of SPI clock
| ( 0 << 8 ) // Start bit polarity
| ( 0 << 7 ) // Disable start bit
| ( 0 << 4 ) // SPIEN active between SPI words
| ( 0 << 3 ) // Turbo is deactivated
| ( 1 << 2 ) // Data Line0 selected for reception
| ( 1 << 1 ) // Data Line1 selected for transmission
| ( 0 << 0 );// No transmission on Data Line0
/* Enable MCSPI channel */
MCSPI_MODULCTRLL = 0x01; // Enable Channel
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