请问AM335x开机时候有上电顺序要求，但是在关闭芯片有时序要求吗？

 
 
 
 
 
 
 
 
 
 
4.1.2 Power-Down Sequencing       
        PWRONRSTn input terminal should be taken low, which stops all internal clocks before power supplies
are turned off. All other external clocks to the device should be shut off.
     The preferred way to sequence power down is to have all the power supplies ramped down sequentially in
the exact reverse order of the power-up sequencing. In other words, the power supply that has been
ramped up first should be the last one that should be ramped down. This ensures there would be no
spurious current paths during the power-down sequence. The VDDS power supply must ramp down after
all 3.3-V VDDSHVx [1-6] power supplies.
这里提到的关闭顺序与开机相反，如果没有类似tps65217等电源管理芯片，突然断电怎样实现这样的关闭顺序？
 
 
 
 
 
 
 

下电的时序要求是一定要满足的。如果不是PMIC的，想自己搭电路的话，也要注意下电这一块的设计。
你可以参考TPS650250的设计来做，TPS650250本身也是独立的DCDC,LDO，自身无上下电时序管理。用它来做电源解决方案时，就通过外部做了时序控制。
http://www.ti.com/lit/pdf/slvu731

如果都是同一时间掉电， 这个没问题，关键在于下面一段话，黑体部分，保证压差要小于2V
If it is desired to ramp down VDDS and VDDSHVx [1-6] simultaneously, it should always be ensured that
the difference between VDDS and VDDSHVx [1-6] during the entire power-down sequence is <2 V. Any
violation of this could cause reliability risks for the device.
                                                                         如果我的回答解决了您的问题，请确认答案，谢谢！：）

你好，
   我看了TPS650250例子，还有两个问题请教：
    1. 在datasheet上写了关闭电源之前要关闭内部和外部时钟，时钟关闭是怎样关闭的？1.1V电压关掉就行了吗？还是需要软件  关  闭？
   2. PWRONRSTn被拉低以后，芯片哪些功能被关闭？