易失性编译器数据类型都混淆了的问题

嗨，所有，我有一个相当简单的代码块的行为奇怪，我似乎找不到问题。我寻求你的帮助找到问题。我有一个SPI模块运行在从模式。大师工作正常。SPI模块具有DMA启动功能，并将其数据发送给USB模块。在这个中断中，我将数据发送到4个不同的USB端点，这取决于FASTRAWCNCn[CHADDR]。EndoPoTnNtValk。structurefastStreamCntis是一个由4组成的数组，允许在同一端点中将不同的数据一起发送到不同类型。USB通信是每个端点事务16×64字节的消息。所以我应该在每个事务中接收16乘以64字节的相同消息类型。如果我不更改fastStreamCnt[chAddr]endpointCntvalue，那么一切都正常。但是，我没有得到足够的USB速度。因此，我需要能够更改u***端点。EachTxMassDataBuffarray属于单个USB端点。但是，问题在于，如果我保持这条线：fastStreamCnt[chAddr]，endpointCnt=endptCnt;，一段时间后，所有数据类型都混淆了。看起来，如果该行：volatile T_FRAME_STREAM*lTxBuff=&TxMassDataBuff[fastStreamCnt[chAddr]endpointCnt]；指向一个任意的TxMassDataBuff。我很难处理没有声明为volatile的变量，因此我更改了它们，结果完全相同。



      以下为原文

    Hi All,

I have a rather simple chunk of code that is behaving weirdly and I cannot seems to find the problem. I seek your help in finding the problem.

I have a spi module that is running in slave mode. The master works correctly. The spi module have DMA enable and sends its data to the USB module.

Here is the DMA interrupt. In this interrupt, I send the data to 4 different u*** endpoints depending on the fastStreamCnt[chAddr].endpointCnt value.  The structure fastStreamCnt is an array of 4 that allows sending different data to different types all together in the same endpoint. The u*** communication is 16 x 64bytes messages per endpoint transaction. So I should receive 16 times 64bytes of the same message type in each transaction.

If I do not change the fastStreamCnt[chAddr].endpointCnt value, it all work. However, I do not get enough USB speed. So I need to be able to change u*** endpoints.

Each TxMassDataBuff array belong to a single USB endpoint.

However, the problem is that if I keep this line :fastStreamCnt[chAddr].endpointCnt = endptCnt; , after some time, all the data types becomes mixted up. It looks like if this line : volatile T_FRAME_STREAM* lTxBuff = &TxMassDataBuff[ fastStreamCnt[chAddr].endpointCnt ]; was pointing to an arbitrary TxMassDataBuff.

I tough it was do to with the variables not being declared as volatile, so I changed them and it did exactly the same.


void __attribute__((interrupt, auto_psv)) _DMA1Interrupt(void) {
    IEC0bits.DMA1IE = 0; // disEnable DMA interrupt
    UINT8 chAddr;
    chAddr = Spi1RxBuffA[0];
   
    if ((chAddr < 4) && !fastStreamCnt[chAddr].isFlushed) { //maximum 4 channels of RF headstage
        //Put data into the endpoint buffer. We put 64 contiguous message in each buffers
        int byteSent = 0;
            
        volatile T_FRAME_STREAM* lTxBuff = &TxMassDataBuff[ fastStreamCnt[chAddr].endpointCnt ];
        lTxBuff->Data[lTxBuff->PosIn] = (FAST_MCU_COMMUNICATION >> 5);
        lTxBuff->Data[lTxBuff->PosIn + 1] = chAddr;
        for (byteSent = 1; byteSent < sizeof(Spi1RxBuffA); byteSent++) {
            lTxBuff->Data[lTxBuff->PosIn + 1 + byteSent] = Spi1RxBuffA[byteSent];
        }

        ConfirmU***BuffAppend_Stream(*lTxBuff);
        fastStreamCnt[chAddr].msgCnt++;
        
      
        //check to ensure we won't have another channel using the same endpoint
        if(fastStreamCnt[chAddr].msgCnt==16){
            
               lTxBuff->EndpointCanBeFreed = 1;  //this one is a bool
            
            volatile unsigned char endptCnt;
            volatile unsigned char c;
            for(endptCnt =0; endptCnt < 4; endptCnt++){
                if( (TxMassDataBuff[endptCnt].EndpointUsed == 0) ){
                    fastStreamCnt[chAddr].endpointCnt = endptCnt;
                    TxMassDataBuff[endptCnt].EndpointUsed = 1;
                    break;
                }
            }
            fastStreamCnt[chAddr].msgCnt= 0;
            
        }
    }
   
    IFS0bits.DMA1IF = 0; // Clear the DMA1 Interrupt Flag
    SPI1STATbits.SPIROV = 0; //need to reset
    DMA1CONbits.CHEN = 1; // Enable DMA Channel
    IEC0bits.DMA1IE = 1; // Enable DMA interrupt
    //DMA1REQbits.FORCE =1;
    IFS0bits.DMA1IF = 0; // Clear the DMA1 Interrupt Flag
}