PSoC 5 ADC的电压参考是什么

在KIT-030这样的工具箱中，用户可以很容易地将参考电容焊在原区域上。我相信SAR ADC的参考引脚都被引入到原空间中。



     以下为原文
  On the kits like Kit-030 a user could easily solder the refernce capacitor on the protoarea. I believe both the reference pins for the SAR ADC are brought out in to the proto space.

OOPS忽略以前的帖子，这是一个错误。打算在另一个话题发表文章。
但是关于VDAC参考的使用。从理论上讲，VDAC可能能够达到与DAC的最小计数一样低的范围，但是我们必须理解，有很多因素影响ADC性能。
其中，有DAC噪声作为参考噪声加入。输出噪声是在任何代码相同的楼层，而ADC是比例的参考。这意味着在参考值较低的情况下，这种噪声可能具有显性效应。ENOB可能会产生严重的影响。
此外，DAC可能具有的任何线性误差将表现为ADC中的线性和增益误差。
我也会担心由于使用VDAC，因为它的高输出阻抗系统对带宽的影响。
虽然在数据表（用户）中还没有出现这种情况，但我认为，在这种情况下，应该期望一些性能下降。



     以下为原文
  Oops ignore the previous post it was a mistake. Intended to post in another topic.
    But about the use of the VDAC reference. Theoritically the VDAC might be able to achieve a range as low as the least count of the DAC but we have to understand that there are lot of factors of the reference that affects the ADCs performance.
    For one, there is the DACs noise which would be adding in as a reference noise. The output noise is the same floor at any code whereas the ADC is ratiometric to the reference. Which means at the lower values of the reference this noise might have a dominant effect. There could be a serious effect on ENOB.
    Also any linearity errors that the DAC might have would manifest into linearity and gain errors in the ADC.
    I would also be worried about the effect on the bandwidth due to the use of the VDAC since its a high output impedance system.
    Though this has not been brought out in the datasheet, a user, I believe should expect some performance degrdation in this case.