类型不匹配

你好，
我是VHDL的新手，已被分配了使用VHDL生成随机数的任务。
我接受了'设计师; Ashenden的VHDL指南'的帮助。
但是，我已经遇到了代码，无法进行相同的调试。
我随函附上以下代码：
_____________________________________________________________________________________________
库IEEE;使用IEEE.STD_LOGIC_1164.ALL;使用IEEE.STD_LOGIC_ARITH.ALL;使用IEEE.STD_LOGIC_UNSIGNED.ALL;包random_types是子类型ALU_func是无符号的（3 downto 0）;
子类型数据字是无符号的（15 downto 0）; end random_types;
___________________________________________________________________________________________
库IEEE;使用IEEE.STD_LOGIC_1164.ALL;使用IEEE.STD_LOGIC_UNSIGNED.ALL;使用IEEE.NUMERIC_STD.ALL;使用IEEE.NUMERIC_bit.ALL;使用IEEE.MATH_REAL.ALL;库工作;使用work.random_types.all; entity random_number_gen
是端口（结果：输出数据字）;结束random_number_gen;架构random_number_gen的行为信号a：数据字;共享变量seed1，seed2：positive：= 1;共享变量a_real：real; begin uniform（seed1，seed2，a_real）;
结果行为结束; _________________________________________________________________________
我得到的错误是：
HDLParsers：800  - “C：/Xilinx/work/random_number_gen/random_number_gen.vhd”第44行.a的类型与to_​​unsigned的类型不兼容。
请帮我调试!!!!
我突出了错误的一行。



以下为原文

Hello,
          I am new to VHDL and have been assigned the task of  generating random numbers with VHDL. I have taken help from 'The Designer;s Guide to VHDL by Ashenden'. However, I have got stuck with the code and cannot debug the same. I am enclosing the code herewith:
_____________________________________________________________________________________________
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

package random_types is
    subtype ALU_func is unsigned (3 downto 0);
    subtype dataword is unsigned (15 downto 0);
end random_types;   
___________________________________________________________________________________________


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.NUMERIC_bit.ALL;
use IEEE.MATH_REAL.ALL;
library work;
use work.random_types.all;


entity random_number_gen is
    Port ( result : out  dataword);
end random_number_gen;

architecture Behavioral of random_number_gen is

signal a: dataword;
shared variable seed1, seed2 : positive := 1;
shared variable a_real:real;
begin

            
               
                uniform(seed1, seed2, a_real);
                a <= to_unsigned(natural(a_real*real(2**integer'(dataword'length))-0.5),dataword'length);
                result <= a;
                        

end Behavioral;

_________________________________________________________________________

The error that i get is:
HDLParsers:800 - "C:/Xilinx/work/random_number_gen/random_number_gen.vhd" Line 44. Type of a is incompatible with type of to_unsigned.


Please help me in debugging it!!!! I have highlighted the line in error.