完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
所有的,所以我花了大约40个小时试图让下面的工作。在音频应用与PIC32 MZ1024ECG64对引脚RG8我有一个已知的主时钟进来。如果你跟踪我的另一个帖子,你可以看到我验证了所有的寄存器。PiBixPosisReMePixPoT(PosisSIDID0,IpPuthOffice RefCKI1,IpPuthPiNo.RPG8);RoSel= 8,RoTrimm=0,在0和1尝试RoDIV,不去…因为我没有得到任何SPI SCK2时钟,我有点受阻,并设置了从RIFCK到PBCROCK2的MSTEN,并找到了一个有效的时钟。所以,我在SPI上的设置至少是工作的,并且我得到了WCK……所以我想到,我可以通过在一个引脚上启用ReFrkO1来输出RFCKI1在RG8上所看到的东西,所以我把它放在RB3:PLIB PosisSyRePaPosil(PoxsSIDID0,OutPuthOffice RefCKO1,OutPuthPiNoRPB3)上,目前我有一个45.1584MHz的CLO。CK进入RG8。所以我想好了,让我们设置如下:RoSele= 7(sys CLK是96MHz,在下面的帖子中更早地验证),RoDiV= 1,RoTrimm=63YEA。RB3有时钟出来,不是所有的手段和负载的抖动。所以我猜使用PLL不是一个好的音频选项。FCKI1的工作,并将其指向SPI?谢谢,戈登
以上来自于百度翻译 以下为原文 All, So I have spent about 40 hours trying to get the following to work. In an audio application with the PIC32MZ1024ECG64 on pin RG8 I have a known Master Clock coming in. If your following my other post you can see that I verified all the registers. PLIB_PORTS_RemapInput(PORTS_ID_0, INPUT_FUNC_REFCLKI1, INPUT_PIN_RPG8); ROSEL = 8, ROTRIM = 0, tried RODIV at 0 & 1, no go... Since I was not getting out any SPI SCK2 clock I was a bit stumped and set the MSTEN from REFCLK to PBCLOCK2 and found a valid clock. Ok so my setup on SPI is at least working and I am getting WCLK ect... So then it occurs to me that I can output what I see on REFCLKI1 on RG8 by enabling REFCLKO1 on a pin so I put it on RB3: PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_REFCLKO1, OUTPUT_PIN_RPB3); Currently I have a 45.1584MHZ clock coming into RG8. So I figure ok, lets make one so I set the following: ROSEL = 7 (SYS CLK is 96MHZ, verified earlier in the post below), RODIV = 1, ROTRIM = 63 Yea the RB3 has the clock coming out, not pretty by all means and loads of jitter. So I guess using the PLL is not an option for good audio. Anyone ever get REFCLKI1 in to work and direct it to SPI? Thanks, Gordon |
|
相关推荐
9个回答
|
|
嗨,表33-19显示了PLL的规格,它的最大抖动为+/- 0.25%,在100ms的周期内。如果这个抖动太大,那么你应该使用一个外部时钟(TCXO)。RegardsBTW:你应该考虑切换PIC32到MZ1024EFG64,它是PIN到PIN兼容PIC32 MZ102。4ECG64(只是A/D转换器是不同的)。许多硅问题已经被修复,特别是XPART操作在PIC32 MZ1024EFG64版本。
以上来自于百度翻译 以下为原文 Hi, The table 37-19 shows the specifications of the PLL which has a max jitter of +/-0.25% over a period of 100ms. If this jitter is too much then you should use an external clock (TCXO). Regards BTW : You should really consider switching to PIC32MZ1024EFG64 which is pin to pin compatible with PIC32MZ1024ECG64 (just A/D converter is mostly different). Many silicon issues have been fixed, especially the XTAL operation on PIC32MZ1024EFG64 version. |
|
|
|
是的,在MZ.EF上,我使用了下面的音频SPI/I2S输出,24.566MHz(IRLC)振荡器在RIFCK1IOTER上:-上面是从一个函数中编辑的,它使用一个结构数组来设置各种采样率,并且宏选择SPI通道。我想我已经选择了正确的值为4100Hz,但可能已经搞砸了。我也不知道MZ.EC是否太破了。注意2:-不要*使用PMD来降低任何与振荡器/未使用的回放有关。见勘误表
以上来自于百度翻译 以下为原文 Yes, on an MZ..EF I have used the following for Audio SPI/I2S out, 24.576MHz (IIRC) Oscillator on REFCLK1I //inside unlock sequence REFO1CONbits.ROSEL=8; REFO1CONbits.RODIV=1; REFO1TRIMbits.ROTRIM=0; REFO1CONbits.DIVSWEN=1; REFO1CONSET=0x00008000; REFO1CONSET=0x00001000; // SPI4CONbits.MSTEN=1; SPI4CON2bits.AUDEN=1; SPI4CON2bits.AUDMOD=0b00; SPI4CONbits.MSSEN=1; SPI4CONbits.MCLKSEL=1; //REFCLKO1 SPI4CONbits.MODE16=0; SPI4CONbits.MODE32=0; SPI4CONbits.ENHBUF=1; SPI4CONbits.CKP=1; SPI4CONbits.CKE=1; SPI4CON2bits.IGNROV=1; SPI4CON2bits.IGNTUR=1; SPI4CONbits.SSEN=1; SPI4CONbits.STXISEL=0x1; SPI4CONbits.SRXISEL=0x0; SPI4BRG=3; SPI4CONbits.ON=1; Note:- the above is edited from a function which used an array of structs to set various sample rates, and macro's to select SPI channel. I think I have picked out the correct values for 44100Hz, but could have screwed up. Also I don't know if the MZ..EC is too broken. Note 2:- do *not* use PMD to power down anything to do with the oscillator/unused refclks. See Errata |
|
|
|
西蒙,我真的很欣赏代码。由于某种原因,我的45.1584MHz时钟没有进入RIFCKO1的选择。我仍然在RB3上亮相。因此在调试器(i改变n=0)中,我有如下:BF801280,Ref1Con 0x000,D208 53768,00000000,00000000,11010010万,BF80,1290,RoF1Trimm,0x00,0,00000000,00000000,00000000,00000000,BF80,12A0,RoF2CON 0x000,4000 16384 16384,16384,BF801 14E8,RFCKIL1R 0x000 000 00100000000、00000000、00000000、0000000、1BF801、154C、RPB3R、0x00、000、0F、15、00000000、00000000、00000000、000、1111、11.所以理论上我应该让ReFLKKI在RB3上不受影响,对吗?我认为这是我需要弄清楚的主要步骤。我已经给钱德勒发了电子邮件,希望在这一点上有奇迹。我可能会尝试焊接到另一个可能的ReFLKI输入,看看这是不是问题。但是RG8的范围在引脚上有45.1584MHz,所以希望有一些愚蠢的事情发生。谢谢,戈登。
以上来自于百度翻译 以下为原文 Simon, I really appreciate the code. For some reason my 45.1584MHZ clock is not getting into the selection of REFCLKO1. I still have this coming out on RB3. So in the debugger (I changed N=0) I have the following: BF80_1280 REFO1CON 0x0000D208 53768 00000000 00000000 11010010 00001000 BF80_1290 REFO1TRIM 0x00000000 0 00000000 00000000 00000000 00000000 BF80_12A0 REFO2CON 0x00004000 16384 00000000 00000000 01000000 00000000 BF80_14E8 REFCLKI1R 0x00000001 1 00000000 00000000 00000000 00000001 BF80_154C RPB3R 0x0000000F 15 00000000 00000000 00000000 00001111 So in theory I should have REFCLKI coming out uneffected my N & M on RB3, right? I think this is the main step I need to figure out. I have emails into Chandler hoping for a miracle at this point. I might try soldering to another possible REFCLKI input to see if that is the problem. But a scope on RG8 has the 45.1584MHZ on the pin, so hopefully something stupid is going on. Thanks, Gordon |
|
|
|
RISC,抱歉的双柱,但另一个是没有到哪里,我现在的问题是得到一个好的时钟在ReFCLKI1,并出来ReFCLKO1。我刚刚测试了使用sys CLK在96MHz,并产生一个MCLK在45.1584MHz。在10Hz的相位噪声测试仪上,这是非常糟糕的,这是我们在音频中测试的,就像-5dB,相当于大约500PS的抖动。这实际上是M数,它影响时钟平均以消除导致抖动的分数结果。在这一点上,TCXO根本无济于事。我有一个0.75 PS低抖动时钟进入ReFrkKi,如果我能让它工作,我会很高兴。谢谢,戈登。
以上来自于百度翻译 以下为原文 Risc, Sorry about the double post, but the other one was going no where and really my issue right now is getting a good clock on REFCLKI1 and to come out REFCLKO1. I just tested using SYS CLK at 96MHz and generating an MCLK at 45.1584MHz. It was really bad on my phase noise tester at 10Hz which is were we test in audio it was like -5dB which would equate to something like 5000pS of jitter. It's really the M number which effects the clock averaging to pull off the fractional result which kills the jitter. A TCXO at this point would not help at all. I have a 0.75ps low jitter clock going into REFCLKI, if I can get that to work I would be happy. Thanks, Gordon |
|
|
|
西蒙,奇怪的是数据表说,RefCON1的BIT14应该读取0,它的读数为1。当我在调试器中的那个寄存器上徘徊时,它说FRZ=1有一些冻结变量吗?其他一切看起来都是对的吗?是的,我确实在Obit字段中启用了OE,所以我可以在RB3上的RIFCKO1输出上看到这一点。谢谢,戈登
以上来自于百度翻译 以下为原文 Simon, Something that is weird is the data sheet says that BIT14 of REFCON1 should read 0 and it's reading 1. When I hover over that register in the debugger it says FRZ=1. Is there some freeze variable? Everything else looks correct? Yes I did enable the OE in the bit fields so I could see this on REFCLKO1 output on RB3. Thanks, Gordon |
|
|
|
|
|
|
|
西蒙,你的救命恩人!!!!我从和声样本代码中得到了这个项目。果然,他们有一套ADC=1.奇怪的是…我的WCK正在运行2X。我会看看我能不能弄清楚,很快我设定N=1,看看I2S是否正在工作。非常感谢!戈登
以上来自于百度翻译 以下为原文 Simon, Your a lifesaver!!! I had gotten this project from the harmony sample code. Sure enough they had this set for ADC=1. Weird though... my WCLK is running 2x. I will see if I can figure that out, quickly I am setting N=1 and see if I2S is working now. Thanks so much! Gordon |
|
|
|
西蒙,在SPI上工作……出于某种原因,我没有从SCK2中得到任何时钟。我明白,如果我启用Frman,我应该一直得到时钟输出。我认为这通常是关闭的原因是,当数据可以发送时,SCK将变得活跃。无论如何,我已经启用了测试,而在SCK2上仍然没有得到任何东西。TIS显示它是输出的,在PGs中没有任何东西用于RG6,所以我有点困惑,为什么我没有得到任何时钟输出。也许我应该担心为什么没有数据到达那里,但现在我有点担心SCK2输出不工作。我又有一个45.1584MHz时钟(n=0,m=0),并且我有一个BRG=7,我在SS2上看到,输出882kHz。然后我意识到在32位帧中使用16位采样,所以我在24/64帧以下的模式下进行了更改,现在我的WCK=44.1kHz SPI2CONTITY。on=0;SPI2BRG= VARBRG;SPI2CONBITS。MSTN=1;SPI2CON2BIT。奥登=1;SPI2CON2BIT。AdMod D=0B00;SPI2CONTITES。MSSEN=1;SPI2CONTITE。MCLKSEL=1;/RIFCK。2KNBIT=1;SPI2CONTITE=1;SPI2CONBIT。CKP=1;SPI2CON2BIT。IGROROV=1;SPI2CON2BIT。O1螺这是为什么我没有在RG6上得到任何输出的原因。我不需要PPS正确吗?不管怎样,任何帮助都会被感激的。谢谢,戈登
以上来自于百度翻译 以下为原文 Simon, Ok onto SPI working... For some reason I am not getting any bit clock out of SCK2. I understand that if I enable FRMEN that I should get an clock output all the time. I take it the reason this is usually off is so that the SCK will only go active when data is available to send. Anyway, I have that enabled for testing and I still don't get anything on SCK2. The TRIS shows it is output and there is nothing in the PPS for RG6 so I am a little confused as to why I am not getting any clock output. Maybe I should be worrying about why there isn't data getting there, but for now I am a little concerned SCK2 output is not working. I have again a 45.1584MHZ clock (N=0, M=0) in and I have a BRG = 7 and I saw on SS2 and output of 88.2KHz. Then I realized you were using 16bit samples in a 32bit frames and so I made the change below MODES for 24/64frame and now my WCLK = 44.1khz SPI2CONbits.ON=0; SPI2BRG = varBRG; SPI2CONbits.MSTEN=1; SPI2CON2bits.AUDEN=1; SPI2CON2bits.AUDMOD=0b00; SPI2CONbits.MSSEN=1; SPI2CONbits.MCLKSEL=1; //REFCLKO1 SPI2CONbits.MODE16=1; SPI2CONbits.MODE32=1; SPI2CONbits.ENHBUF=1; SPI2CONbits.CKP=1; SPI2CONbits.CKE=1; SPI2CON2bits.IGNROV=1; SPI2CON2bits.IGNTUR=1; SPI2CONbits.SSEN=1; SPI2CONbits.STXISEL=0x1; SPI2CONbits.SRXISEL=0x0; SPI2CONbits.FRMEN =1; SPI2CONbits.ON=1; varBRG = 7 for 44.1KHz. Still a bit concerned as to why I am not getting any output on RG6. I don't have to PPS that correct? Anyway, any help would be appreciated. Thanks, Gordon |
|
|
|
西蒙,好吧,I2S在工作,谢谢!现在需要弄清楚DAC芯片出了什么问题。戈登
以上来自于百度翻译 以下为原文 Simon, Ok I2S is working, thanks! Need to figure out what's wrong with the DAC chip now. Gordon |
|
|
|
只有小组成员才能发言,加入小组>>
5212 浏览 9 评论
2019 浏览 8 评论
1944 浏览 10 评论
请问是否能把一个ADC值转换成两个字节用来设置PWM占空比?
3192 浏览 3 评论
请问电源和晶体值之间有什么关系吗?PIC在正常条件下运行4MHz需要多少电压?
2246 浏览 5 评论
760浏览 1评论
647浏览 1评论
有偿咨询,关于MPLAB X IPE烧录PIC32MX所遇到的问题
567浏览 1评论
PIC Kit3出现目标设备ID(00000000)与预期的设备ID(02c20000)不匹配。是什么原因
659浏览 0评论
557浏览 0评论
小黑屋| 手机版| Archiver| 电子发烧友 ( 湘ICP备2023018690号 )
GMT+8, 2024-12-11 19:53 , Processed in 1.875418 second(s), Total 94, Slave 76 queries .
Powered by 电子发烧友网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
电子发烧友观察
版权所有 © 湖南华秋数字科技有限公司
电子发烧友 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号