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你好,我在PIC32 MZEF初学者工具包上运行了一个和谐的例子“TCPIPPTCP服务器”。添加下面的代码杀死了TCP部分,但是我的新定时器ISR将被开火。也就是说,我可以眨一下LED,BU就不能再启动起动器套件了。我看不出这两个代码实现之间发生了什么冲突,它们独立运行而没有问题。
以上来自于百度翻译 以下为原文 Hello, I am running the hARMony example "tcpip_tcp_server" on a PIC32MZEF starter kit. Adding the following code kills the TCP portion, but my new timer ISR will fire. i.e. I can blink the LED, bu can no longer ping the starter kit. void Init_Timer_4_5(void) { /* * If the desired timer frequency is 200 kHz * FPB = 100 MHz * Timer prescale setting: 2:1 * * 1/200 kHz = (PR2 + 1) * TPB * (Timer prescale value) * 5 us = (PR2 + 1) * 0.01 us * (2) * PR2 = 249 */ // Configure Timer 4 & 5 for 32-bit operation T4CON = 0x0; // Stop 16-bit Timer4 and clear control register T5CON = 0x0; // Stop 16-bit Timer5 and clear control register T4CONbits.T32 = 1; // 32-bit mode T4CONbits.TCKPS = 0b010; // prescale of 4 TMR4 = 0x0; // Clear contents of the TMR4 and TMR5 //TMR5 = 0x0; PR4 = 24999999; // Load PR4 and PR5 registers with 32-bit value IPC6bits.T5IP = 3; // priority IPC6bits.T5IS = 1; // Subpriority IFS0bits.T5IF = 0; // Clear timer interrupt flag IEC0bits.T5IE = 1; // Timer interrupt enable T4CONbits.ON = 1; // Timer start. } // 32-bit timer 4/5 combo void __ISR(_TIMER_5_VECTOR, ipl3SRS) __TIMER_5_IntHandler (void){ BSP_LEDToggle(BSP_LED_2); IFS0bits.T5IF = 0; // Clear the interrupt flag. } I am not seeing what conflict occurs between these two code implementations that independently operate without issue. Any help would be appreciated. |
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4个回答
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这可能不是你的问题的原因,但不要使用方法寄存器。PIC=0(或1)。这不是一个原子指令,并且可能导致使用IFS0的其他中断的问题。取而代之的是使用IFS0CLR=原子IFS0OT5IFI掩模。
以上来自于百度翻译 以下为原文 This may not be the cause for your problem but don't use the method register.bit=0 (or 1) for PIC 32. This is not an atomic instruction and can lead to problem with other interrupts that also uses IFS0. Instead use IFS0CLR=_IFS0_T5IF_MASK which is atomic. /Ruben |
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谢谢。但是,这并没有解决我的问题。另外,您的建议是指仅在ISR中写入IFS寄存器,还是在IFS寄存器写入/清除的任何地方?
以上来自于百度翻译 以下为原文 Thanks. However, this did not solve my problem. Separately, does your suggestion refer to the writing of IFS registers only within an ISR, or anywhere an IFS register is written/cleared? |
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和谐TCP/IP协议栈使用SysStTMR服务,它使用定时器驱动程序(DRVYTMR),使用硬件定时器。您为MHC设置了什么硬件定时器?首先,检查一下没有冲突。
以上来自于百度翻译 以下为原文 The Harmony TCP/IP stack uses the SYS_TMR service which uses the timer driver (DRV_TMR) which uses a hardware timer. What hardware timer do you have configured for your MHC set up? First thing check that there's no conflict. |
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任何地方。如果有不同优先级的ISR,则在ISR内部。问题是读修改写。如果在读取值但在写回之前,操作被中断,写回可以取消ISR中的写入。这适用于所有可以通过硬件改变或在ISR内部和外部使用的寄存器。/ Ruben
以上来自于百度翻译 以下为原文 Anywhere. And inside ISR if there are ISRs with different priority. The problem is the read-modify-write. If the operation is interrupted when the value is read but before it is written back, the write back can cancel the write in the ISR. This goes for all registers that can be changed by hardware or is used both inside and outside ISRs. /Ruben |
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