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我们使用UART1在PIC32 MX150 F256H上进行维护接口。我们已经启用了错误并接收中断，并且禁用了TX中断（我们通过中断接收，但只是在发送下一个字符之前发送空时进行轮询）。奇怪的事情正在发生：偶尔连接或断开串行电缆（可能是通用的）。E噪声），我们的固件锁定。调试中，我看到我们陷入了一个TX中断循环（见附加屏幕截图’代码破解。PNG’只是为了参考），这显然是奇怪的，因为无法启用TX中断。但是当我查看寄存器（截屏）RGS.PNG时，我确认只有RX和Err中断被启用（IEC1＝00000000 11000000），但是TX和Err标志都被设置（IFS1＝00001011×01000000）。因此，我正在使用的这个通用处理器处理TX中断（它实际上不应该存在），并且清除TX标志，但是可能错误地留下错误标志，使我处于一个循环中。另外奇怪的是，即使设置了我的错误标志，也没有设置U1STA位PrR、ORR或FER。根据数据表，应该是这些条件之一。所以…这太奇怪了。所以我的问题是：1）如果TX中断没有启用，我的TX标志如何被设置？！！！）2）当没有设置错误位（Prr，Orr，Felr）时，为什么设置了我的Err标志？3）处理错误的正确方法是什么？我想我可以删除我的TX处理器，但如果它将生成，我想处理/清除它。我是否应该总是清除所有标志，以防超过一个（Rx，TX，Err）被设置？谢谢你的帮助。
以上来自于百度翻译 以下为原文 We are using UART1 on a PIC32MX150F256H for a maintenance interface. We have enabled the error and receive interrupts, and disabling the TX interrupt (we receive via interrupt, but just poll for when the transmit is empty before sending the next character). A strange thing is happening: occasionally when we connect or disconnect the serial cable (and probably generate noise), our firmware locks up. Debugging in, I see that we get caught in a TX interrupt loop (see attached screenshot 'codebreak.png' just for reference), which is obviously odd since TX interrupts aren't enabled. But when I look at the registers (screenshot 'regs.png) I confirm that the only the RX and ERR interrupts are enabled (IEC1=00000000 11000000) but both the TX and ERR flags are set (IFS1=00001011 01000000). So this generic handler I'm using handles the TX interrupt (which should actually never exist) and clears the TX flag, but perhaps leaves the error flag intact which catches me in a loop. The other odd thing is that even though my error flag is set, none of the U1STA bits PERR, OERR, or FERR are set. According to the datsheet, it should be one of these conditions. so..... that's weird too. So my questions are: 1) How/why would my TX flag be set if TX interrupts aren't enabled (?!!) 2) Why is my ERR flag set when none of the error bits (PERR, OERR, FERR) are set? 3) What's the proper way to handle errors, if not this? I guess I could just remove my TX handler but if that will be generated I want to handle/clear it. Should I just always clear all flags, in case more than one (RX,TX,ERR) are set? Thank you for any help/insights. Attached Image(s) 
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15个回答
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状态标志不受中断使能标志的影响，掩蔽只停止STAUS标志产生实际中断。FRR和PURR只引用当前字符，一旦RXRG被读取，它们就改变以反映FIFO中的下一个字符的状态，因此应该对每个接收到的字符进行检查以查看到底发生了什么。当串行电缆被连接或断开时，一个坏字符或两个字符是完全正常的，所以需要在代码中放置一些东西来处理这个问题。
以上来自于百度翻译 以下为原文 The status flags are unaffected by the interrupt enable flags, the masking only stops the staus flags from generating an actual interrupt. FERR and PERR only refer to the current character, as soon as the RXREG is read they change to reflect the status of the next character in the FIFO, so they should be checked for every received character to see what is really happening. A bad character or two when a serial cable is connected or disconnected is perfectly normal, so you need to put something in your code to handle this cleanly. |
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谢谢你的回复…哦，在我的例子中，中断是由错误产生的，而且正好发生了TX标志，因为它恰好也准备好发送了。这是有道理的。“干净”基本上是在清理所有的三个旗帜吗？因为它是合理的任何（特别是如果它的中断未启用）设置？
以上来自于百度翻译 以下为原文 Thanks for the response... oh, so in my case the interrupt is generated by the error, and it just so happens that the TX flag is set because it happens to also be ready to send? That makes sense. Would "cleanly" basically be clearing all three flags all the time then? Since it is plausible for any (esp if its interrupt are not enabled) to be set? |
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你不需要清除珀尔和费尔。如上所述，它们只是应用于最近接收到的字符的状态标志。如果您在接收字符时设置了特殊操作，则由您决定是否采取任何特殊操作。
以上来自于百度翻译 以下为原文 You don't need to clear PERR and FERR. As mentioned, they are just status flags applying to the most recently received character. It's up to you to decide if you want to take any special action if they are set when you receive a character |
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对不起，我的意思是清除所有三个中断标志，或者至少设置了哪一个（即，不仅仅是第一个找到的，因为可以设置多个）。例如：INTClearFlag（ITU-U1TX）；INTClearFlag（ItU-U1RX）；INTClearFlag（In U1E）；
以上来自于百度翻译 以下为原文 Sorry, I meant clear all three interrupt flags, or at least whichever is set (i.e., not just the first one found, since multiple could be set). e.g.: INTClearFlag(INT_U1TX); INTClearFlag(INT_U1RX); INTClearFlag(INT_U1E); |
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即使它被设定了吗？实际上，我只是重新编写它来清除设置的每个标志，而不仅仅是第一次找到的标志。因此，在上面的例子中，它将清除错误和TX标志。它工作100%更好，从不悬挂当我产生一些噪音。如果TX标志不是发生中断的话，那么清除TX标志会有不良影响吗？
以上来自于百度翻译 以下为原文 Even if it is set? I actually just rewrote it to clear EACH flag that is set, not just the first found. So in my case above it would clear both the ERROR and TX flags. It works 100% better, never hangs when I generate some noise. Is there a bad effect of clearing the TX flag if it doesn't happen to be the one that generated the interrupt? |
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对于初学者，您可能无法清除它。在PIC32上，在中断中断的条件之前，您不能清除中断。唯一的办法是停止发送一个字符…
以上来自于百度翻译 以下为原文 For starters, you probably can't clear it. On PIC32, you can't clear an interrupt until the condition causing the interrupt has been cleared. Your condition is the TX buffer being empty. The only way to stop that is to send a character... |
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我记不起这个瞬间的控制位（是SIDL吗？）…但这不是一种可配置的行为：（a）在该条件下产生一个中断，或者（b）在该条件下产生连续中断？我相信我们有这个集合只是在条件发生时产生一个中断。
以上来自于百度翻译 以下为原文 I can't remember the control bit this instant (is it SIDL?)... but isn't that a configurable behavior: (a) generate one interrupt on the condition or (b) generate continuous interrupts on the condition? I believe we have this set to just generate one interrupt on the occurrence of the condition. |
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不，这取决于你使用的设备。一些较旧的有边缘敏感中断，但是大多数较新的中断具有级别敏感（或“持久性”，如微芯片调用它们）。SIDL标志涉及外围设备在“空闲”节电状态下的行为（见数据表的第26部分）。
以上来自于百度翻译 以下为原文 No, it depends on the device you're using. Some of the older ones have edge-sensitive interrupts, but most of the newer ones have level-sensitive (or "persistent", as Microchip calls them). The SIDL flag relates to how the peripheral behaves in the "idle" power-saving state (see section 26 of the data sheet). |
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以下是我所想的……15-14 UTXISEL.LT；1:0和：TX中断模式选择BITS11=保留，不使用10=中断产生和断言，而发送缓冲器是空的01＝中断，当所有字符都已被发送时，断言并断言：TED并声明，而发送缓冲区至少包含一个空格
以上来自于百度翻译 以下为原文 Here's what I was thinking of... bit 15-14 UTXISEL<1:0>: TX Interrupt Mode Selection bits 11 = Reserved, do not use 10 = Interrupt is generated and asserted while the transmit buffer is empty 01 = Interrupt is generated and asserted when all characters have been transmitted 00 =Interrupt is generated and asserted while the transmit buffer contains at least one empty space |
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注意，除了“保留”之外，其他三个条件都将是真实的，当没有什么被发送时，这意味着你不能清除中断。
以上来自于百度翻译 以下为原文 Note that apart from "reserved" the other three conditions will all be true when nothing is being transmitted. That means you can NOT clear the interrupt. |
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我明天再确认，但我认为“当所有字符都被发送时，断言”当缓冲区清除，边缘触发时，触发一次。这与我记得如何设置它和我的所有调试（例如断点开机时）是一致的。
以上来自于百度翻译 以下为原文 I'll confirm tomorrow but I think "asserted when all characters have been transmitted" fires once when the buffer clears, edge triggered. This is consistent with how I recall setting it up and all of my debugging (e.g. when breakpoints fire). |
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注意，只要在FIFO中存在空间，只要在最后一个字符移出后FIFO是空的，模式0将断言中断，只要FIFO是空的（2，但最后一个字符仍然可以发送），模式2将断言中断。也见表7-1和“持久中断”列。
以上来自于百度翻译 以下为原文 Note the phrasing, "generated and asserted while..." Mode 0 will assert the interrupt as long as there is space in the FIFO, mode 1 as long as the FIFO is empty after the last character has been shifted out, and mode 2 as long as the FIFO is empty (but the last character can still be transmitting). Also see table 7-1 and the "Persistent Interrupt" column. |
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对，我认为措辞“何时”而不是“何时”值得注意。
以上来自于百度翻译 以下为原文 Right and I think the phrasing "and asserted when" rather than "while" is noteworthy. |
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继续尝试一下，但是考虑中断逻辑会包含一个完全不同的操作模式，它只在一个特定的配置中使用。
以上来自于百度翻译 以下为原文 Go ahead and try it out, but consider how likely it is that the interrupt logic would include a completely different mode of operation, used in only one particular configuration. |
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