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我有几个不同的电路板工作得很好,如果我把时钟设置为80到200兆赫的速度,它们在外部POSC和FRC上运行良好。我可以运行到80兆赫,而不是70兆赫。这是一个和谐的项目,根本没有驱动程序(也没有USB)。在和谐中,我只使用时钟配置器(我不做任何其他设置)。数据表说,即使启用USB,设备应该从60兆赫到200兆赫,没有USB,它应该运行到DC。必须有一些“幕后”的设置,我需要-禁用缓存也许?有人知道我为什么愚蠢地不能这样做吗?这是飞行员的错误(不总是)吗???)事实证明,我有一个SPI模块,配置为时钟不能在任何小于80兆赫的正确配置。当我把调试器放在板上时,它挂在系统异常中。返回到Meal.C并遍历所有初始化步骤,我看到在SPI初始化步骤中抛出异常。降低SPI时钟频率解决了这个问题。谢谢大家的帮助。提示:不要跟我飞!-再次感谢…
以上来自于百度翻译 以下为原文 I have a several different boards that work fine and if I set the clock to any speed from 80 - 200 MHz they run fine on the external POSC and the FRC. I can run down to 80 MHz, but not 70 MHz. It is a hARMony project with no drivers enabled at all (No USB either). In Harmony I just use the clock configurator (I don't do any other settings). The data sheet says that even with the USB enabled the device should run from 60 MHz to 200 MHz and with no USB it should run to DC. There must be some 'behind the scenes' setting that I need - Disable the cache perhaps? Anyone know why I stupidly can't get this to work? ====[ Solution ]========================================================= It was pilot error (isn't it always???) It turns out that I had a SPI module configured to have a clock that could not be properly configured at anything less than 80 MHz. When I put the debugger on the board it hung in the system exception. Going further back to main.c and stepping over all the initialization steps, I saw the exception being thrown at the SPI Initialize step. Lowering the SPI clock frequency solves the problem. Thanks for everyone's help. Hint: Don't ever fly with me! ;-) Thanks again... |
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马上,我会说,“不,”因为你没有给我们任何东西一起工作。但是,我会给出一些观察/问题/建议。首先,你如何测试?我通常设置一个定时器在某个已知的时间间隔中断并使LED闪烁。像定时器这样的默认外围时钟设置为系统频率的一半。无论如何,你说的“不能让它工作”是什么意思?它停止运行了吗?它运行的频率是不是你预期的?什么?其次,这是一个和谐的项目,你使用时钟配置器来设置PLL参数,并且为你的应用程序提供所有其他代码?或者……你不知何故,使用来自和谐时钟配置器的信息在一个单独的(非和谐的)项目中。或者……什么?下一步……你想要什么样的频率?我将给出32兆赫系统频率的示例参数。下面是我如何手工解决的(老式的方法):为了保持简单(避免典型的论坛重复,质疑你的外部振荡器源和频率和布局等),我将使用(8 MHz)FRC。从32兆赫的PLL输出频率向后工作,我们需要一个VA。LLUE的LooDeV可以使我们从350-700兆赫范围内的VCO频率获得32兆赫。(数据表中的表32-9:FVCO的值)现在,32 MHz×16=512兆赫,非常适合于这个范围,所以我将使用PLLoDIV的值除以16。现在,用8 MHz的输入频率和PLLIDEV设置除以1,VCO的输入频率是8 MHz,并且我们需要VCO乘以64。为了得到512兆赫,所以PLLMULT将被设置为乘64。这些不是由和谐时钟配置器给出的值吗?现在,对于“实际”项目,我通常从FRC直接(非PLL)低速开始,经过几次自我测试后,我切换到操作速度。但是,对于初始测试,我只使用最简单的方法:定义配置参数值来设置它,这样它就可以不用代码初始化任何东西了。底线:系统频率=(8 MHz / 1)* 64/16=32 MHZ,这是我用这些配置值得到的。在我的好奇心PIC32 MZEF。(XC32版本1.44)在“免费”模式下的非协调项目,MPLABX版本4.15。我用一个毫秒定时器使用16毫秒的外围时钟(FSt/ 2)确定了LED闪烁。
以上来自于百度翻译 以下为原文 Right off hand, I would say , "no," since you didn't give us anything to work with. However, I'll give a few observations/questions/suggestions. First of all, how are you testing? I usually set up a timer to interrupt at some known interval and make an LED blink. Default peripheral clocks to things like timers are set to be half the system frequency. Anyhow... What do you mean by "can't get this to work"?
Secondly...
Next...
I'll give example parameters for 32 MHz system frequency. Here's how I figured it out manually (the old-fashioned way): To keep things simple (and to avoid the typical forum iterations that question your external oscillator source and frequency and layout, etc.), I'll use the (8 MHz) FRC. Working backwards from a PLL output frequency of 32 MHz, we need a value of PLLODIV that can make us get 32 MHz from a VCO frequency in the range 350-700 MHz. (Ref: Table 37-9 in the Data Sheet: Values for Fvco) Now, 32 MHz * 16 = 512 MHz, which fits nicely in that range, so I'll use a value for PLLODIV to divide by 16. Now, with an 8 MHz input frequency and PLLIDIV set to divide by 1, the Vco input frequency is 8 MHz, and we need the VCO to multiply by 64 to get 512 MHz, so PLLMULT will be set to multiply by 64. Aren't these the values given by the Harmony clock configurator? Now, for "real" projects, I typically start at a (non-PLL) low speed directly from FRC, and after a few self-tests I switch to the operating speed. However, for initial testing, I just use the simplest approach: Define configuration parameter values to set it up so that it's ready to go without having to initialize anything in code. Bottom line: System frequency = (8 MHz / 1) * 64 / 16 = 32 MHz That's what I got with these configuration values // DEVCFG2 #pragma config FPLLIDIV = DIV_1 // System PLL Input Divider (1x Divider) #pragma config FPLLRNG = RANGE_5_10_MHZ // System PLL Input Range (5-10 MHz Input) #pragma config FPLLICLK = PLL_FRC // System PLL Input Clock Selection (FRC is input to the System PLL) #pragma config FPLLMULT = MUL_64 // System PLL Multiplier (PLL Multiply by 64) #pragma config FPLLODIV = DIV_16 // System PLL Output Clock Divider (16x Divider) Tested on my Curiosity PIC32MZEF. (Non-Harmony project with XC32 version 1.44 in "Free" mode, MPLABX version 4.15). I made an LED blink with a cadence determined by a millisecond timer using Peripheral Clock of 16 MHz (Fsystem / 2). Regards, Dave |
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你保持PLL的各个部分在规格内吗?
以上来自于百度翻译 以下为原文 Are you keeping the various parts of the PLL within spec? |
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嗨,戴夫-谢谢你的时间,我同意我做了一个拙劣的工作描述我的问题。我使用和谐时钟配置来配置时钟(配置总是计算出期望的时钟罚款,没有错误)。我让和谐构建样板应用程序(没有其他司机被选中)。在APP任务循环中,我基于核心定时器将阻塞时间延迟保持在1秒。我切换一个引脚和测量与我的范围。我可以设置任何频率从200到80兆赫,它都工作良好,即引脚切换在适当的速度。在70兆赫以下的PIC不运行。我的PIN不切换。我看到你可以让它运行前和谐-我将不得不尝试当我有机会。我希望有人会记得一些“有趣的怪癖”与和谐和线索我。很明显,我的飞行员有一些错误,我需要进一步调查。即调试,看看PIC运行任何代码,看看和谐时钟位配置设置。我感谢您的帮助。Y从我的板凳上一个星期,所以这将是一点之前,我可以再次尝试。
以上来自于百度翻译 以下为原文 Hi Dave - Thanks for your time I agree I did a poor job of describing my problem. I use Harmony clock config to configure the clocks (The config is always calculating the desired clock fine with no errors). I let Harmony build the sample app (no other drivers were selected). In the App Tasks loop - I stick a blocking time delay based on the core timer for 1 second. I toggle a pin and measure with my scope. I can set any frequency from 200 to 80 MHz and it all works fine i.e. the pin toggles at the proper rate. At 70 MHz and below the PIC does not run. My pin does not toggle. I see that you can get it to run ex-harmony - I will have to try that when I get the chance. I was hoping that someone would remember some 'funny quirk' with Harmony and clue me in. Clearly there is some pilot error on my part - I will need to investigate further. i.e. Debug to see if the pic runs any code and look at the harmony clock bit config settings. I appreciate your help. ================================================================ NKurzman - Yes I am keeping the PLL params in spec as I am letting Harmony calculate the clock settings for me. I am away from my bench for a week so it will be a bit before I can try this again. |
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所以你愿意相信芯片是坏的,但和谐是完美的?检查设置和声给你,并核实他们对数据表。
以上来自于百度翻译 以下为原文 So you are willing to believe the chip is bad, but Harmony is perfect? Check the settings Harmony gives you and verify them against the data sheet. |
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NKurzman,显然我在整个帖子里解释得很差。真正让我失望的是PIC停止运行在80兆赫以下的事实——我最初认为它可能对缓存设置有所帮助,因为这是PIC切换缓存(可能更接近70兆赫)的时候,但仍然足够接近,让我想知道什么是GOIN。我很感激你的帮助!-)
以上来自于百度翻译 以下为原文 NKurzman, Apparently I did a rather poor job explaining in this entire post. What really threw me was the fact the the PIC stopped running at below 80 MHz - I initially thought that might have something to the Cache settings because that is around the point where the PIC switches the cache on (probably closer to 70 MHz) but still close enough to make me wonder what was going on... I appreciate your help! :-) |
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对于那些试图追随这个话题的人来说,解决方案回到了第一个帖子。
以上来自于百度翻译 以下为原文 For those trying to follow the flow of this topic, the solution is back in the first post. |
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