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问题概述:ADC配置成同步采样模式,排序器级联,ADC时钟25MHz,采样率12.5MSPS,同步采样A0,B0的模拟信号,A0,B0的模拟信号是信号源输出的1MHz正弦波,采样点512个; 在CCS6.1的Graph中观察到采样的1MHz正弦波信号的采样率根本就不是12.5MSPS,像是100MSPS,而且每个采样点重复采样了4次,使得正弦波出现了阶梯状; 出现的疑问: 1.在这种设置模式下,ADC的采样率到底是多少? 2.每个采样点为什么会重复采样了4次,使得正弦波出现了阶梯状? 以下是我的配置代码,不知道是否有问题,请各位大神帮我看看!! main.c文件代码: #include "Fir.h" #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File #include "DSP2833x_Examples.h" // DSP2833x Examples Include File #define LED4 GpioDataRegs.GPADAT.bit.GPIO0 #define LED3 GpioDataRegs.GPADAT.bit.GPIO1 #define LED1 GpioDataRegs.GPADAT.bit.GPIO6 #define LED2 GpioDataRegs.GPADAT.bit.GPIO7 #define BUZZ_C GpioDataRegs.GPBSET.bit.GPIO60=1; #define BUZZ_O GpioDataRegs.GPBCLEAR.bit.GPIO60=1; interrupt void ISRExint1(void); void configtestled(void); void InitExInt(void); #if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT #define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz #endif #if (CPU_FRQ_100MHZ) #define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz #endif #define BUF_SIZE 512 // Sample buffer size // Global variable for this example Uint16 SampleTable[BUF_SIZE]; Uint16 SampleTable2[BUF_SIZE]; volatile Uint16 ADC_Start = 0; void main(void) [ Uint16 i; Uint16 array_index=0; InitSysCtrl(); EALLOW; SysCtrlRegs.HISPCP.all = ADC_MODCLK; EDIS; DINT; InitPieCtrl(); IER = 0x0000;// Disable CPU interrupts and clear all CPU interrupt flags: IFR = 0x0000; InitPieVectTable(); InitExInt(); EALLOW; // This is needed to write to EALLOW protected registers PieVectTable.XINT1 = &ISRExint1; EDIS; // This is needed to disable write to EALLOW protected registers PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block PieCtrlRegs.PIEIER1.bit.INTx4= 1; IER |= M_INT1; // Enable CPU int1 EINT; // 中断使能 ERTM; // Enable Global realtime interrupt DBGM configtestled(); BUZZ_C;//关掉蜂鸣器 InitAdc(); // For this example, init the ADC // Clear SampleTable for (i=0; i
[ SampleTable = 0; SampleTable2 = 0; AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1; //Start-of-conversion (SOC) trigger for Sequencer 1 (SEQ1) while(1) [ //if(ADC_Start) [ while(AdcRegs.ADCST.bit.INT_SEQ1 == 0); AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; SampleTable[array_index] = ((AdcRegs.ADCRESULT0)>>4); SampleTable2[array_index] = ((AdcRegs.ADCRESULT1)>>4); array_index++;//DELAY_US(1); if(array_index > (BUF_SIZE-1)) [ ADC_Start = 0; array_index =0; //LinearConvolution(a,b,Sample,h,y1);//线性卷积 interrupt void ISRExint1(void) [ ADC_Start = 1; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; void InitExInt(void) [ EALLOW; GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 0; GpioCtrlRegs.GPADIR.bit.GPIO13 = 0; GpioCtrlRegs.GPAQSEL1.bit.GPIO13= 0; GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 13;//选择GPIO13为外部输入XINT3输入引脚 XIntruptRegs.XINT1CR.bit.POLARITY= 1;//上升沿触发中断 XIntruptRegs.XINT1CR.bit.ENABLE = 1; //使能XINT3中断 EDIS; void configtestled(void) [ EALLOW; GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0; // GPIO0复用为GPIO功能 GpioCtrlRegs.GPADIR.bit.GPIO0 = 1; // GPIO0设置为输出 GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0; // GPIO1 = GPIO1 GpioCtrlRegs.GPADIR.bit.GPIO1 = 1; GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0; // GpioCtrlRegs.GPADIR.bit.GPIO6 = 1; GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0; // GpioCtrlRegs.GPADIR.bit.GPIO7 = 1; GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 0; // GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0; GpioCtrlRegs.GPBDIR.bit.GPIO60 = 1; EDIS; InitAdc.c 文件代码如下: #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File #include "DSP2833x_Examples.h" // DSP2833x Examples Include File #define ADC_usDELAY 5000L #define ADC_CKPS 0x0 // ADC module clock = HSPCLK/1 = 25.5MHz/(1) = 25.0 MHz #define ADC_SHCLK 0x0 // S/H width in ADC module periods = 1 ADC cycle void InitAdc(void) [ extern void DSP28x_usDelay(Uint32 Count); EALLOW; SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; ADC_cal(); EDIS; // Specific ADC setup for this example: AdcRegs.ADCTRL1.bit.CPS = 0; //ADCCLK = Prescaled HSPCLK (ADCCLKPS[3:0]) AdcRegs.ADCTRL1.bit.ACQ_PS = 0; // ADC module clock = HSPCLK/1 = 25MHz // If Simultaneous mode enabled: Sample rate = 1/[(3+ACQ_PS)*ADC clock in ns] AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // Setup cascaded sequencer mode AdcRegs.ADCTRL1.bit.CONT_RUN = 1; // Setup continuous run AdcRegs.ADCTRL1.bit.SEQ_OVRD = 1; // Enable Sequencer override feature //AdcRegs.ADCTRL2.bit.RST_SEQ1 = 0x1; //Immediately reset sequencer to state CONV00 AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 0x1;//SEQ1 interrupt enable AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0x0;//SEQ1 interrupt mode AdcRegs.ADCTRL3.bit.ADCCLKPS = 0x0;//HSPCLK AdcRegs.ADCTRL3.bit.SMODE_SEL = 0x1; // Setup simultaneous sampling mode AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3; //The bandgap and reference circuitry is powered up. DELAY_US(1); AdcRegs.ADCTRL3.bit.ADCPWDN = 0x1; //The analog circuitry inside the core is powered up AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x0; // 1 double conv's (2 total) AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup conv from ADCINA0 & ADCINB0 DELAY_US(ADC_usDELAY); // Delay before converting ADC channels |
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