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[问答] 请问是否可以在双层PCB上使用PQ208封装?
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你好,
我正在设计一个带有ADC和DAC的基于FPGA的信号处理单元(大约1MSPS采样率,最大32MHz到50MHz SPI数据时钟速率)。
系统将由50MHz振荡器提供时钟(DCM内部增加到150MHz)。
第一个原型被设计为Spartan-3E Starter-Kit的扩展,现在我正在设计完整的系统。
不幸的是我必须使用PQ208封装,因为我们无法焊接BGA封装。
PCB只有两层铜层(顶部/底部),底层主要用作接地层。
现在我有一些问题:
是否可以在双层PCB上使用PQ208封装?何处放置去耦电容?
目前,我计划为每个电源引脚(如Spartan-3E入门板)使用1nF和47nF陶瓷电容,为每个VCCO组,VCCINT和VCCAUX提供470nF陶瓷电容和10uF陶瓷电容。
当我将帽(特别是1nF / 47nF)直接放在顶层(FPGA所在的位置)的电源引脚上时,我阻止了对I / O引脚的访问。
但是当我将它们放在底部并使用两个过孔和走线连接到FPGA时,这会增加电感。你有建议我应该如何布线电源吗?在这些情况下我是否应该考虑哪些重要的事情?谢谢
提前任何帮助。
最好的祝福,
基督教
消息由milindur于10-30-2009 04:41 PM编辑

以上来自于谷歌翻译


以下为原文

Hello,

I am designing a FPGA-based signal processing unit with ADCs and DACs (about 1MSPS sampling rate, max. 32MHz to 50 MHz SPI data clock rate). The system will be clocked by a 50MHz oscillator (internally increased to 150MHz by a DCM). The first prototype was designed as extension to the Spartan-3E Starter-Kit, now I am designing the complete system. Unfortunately I have to use the PQ208 package as we are not able to solder BGA-packages. The PCB only has two copper-layers (top/bottom) where the bottom layer will be mainly used as groundplane.

Now I have got some questions:
  • Is it possible to use the PQ208-package on a two-layer PCB?
  • Where should I place the decoupling capacitors? Currently I am planing to use a 1nF and a 47nF ceramic cap for each supply pin (as in the Spartan-3E Starter-Board), a 470nF ceramic cap as well as a 10uF tantal cap for each VCCO-bank, VCCINT and VCCAUX. When I place the caps (especially the 1nF/47nF) directly at the supply pins on the top layer (where the FPGA is), I am blocking the access to I/O-pins. But when I place them on the bottom side and use two vias and traces for connection to the FPGA this increases the inductance.
  • Do you have a recommendation how I should route power supply?
  • Are there any important things I should consider under these circumstances?
Thanks for any help in advance.
Best regards,
Christian
Message Edited by milindur on  10-30-2009 04:41 PM
0
2019-6-20 11:54:46   评论 分享淘帖 邀请回答
4个回答
我想你的最终产品是成本敏感的,否则你不会考虑使用2层板,
但是我相信你在两层高速逻辑上遇到了麻烦。
如果
董事会必须是2层,因为它有一个大面积的其他缓慢的东西,你可能
考虑为斯巴达人提供一个模块。
Enterpoint上有一些例子
网站,例如Darnaw1,带有针脚网格阵列和所有去耦
在船上。
http://www.enterpoint.co.uk/moelbryn/darnaw1.html
如果您的电路板相对较小,那么转到4层的成本可能比您想象的要低
在我看来值得区别。
你真的希望有一个坚实的基础
飞机和4层将允许您的旁路组件在后面
董事会。
另外,使用另一个内层作为动力的分割平面
提供一些额外的高速去耦,你不会得到任何数量的
两层结构的电容器。
问候,
的Gabor
-  Gabor

以上来自于谷歌翻译


以下为原文

I imagine your end product is cost sensitive or else you wouldn't consider a 2-layer board,
however I believe you're asking for trouble with high-speed logic on two layers.  If the
board must be 2 layers because it has a large area for other slow stuff, you might
consider a module for the Spartan.  There are some examples on the Enterpoint
website, for example the Darnaw1 with a pin grid array footprint and all decoupling
on board.
 
http://www.enterpoint.co.uk/moelbryn/darnaw1.html
 
If your board is relatively small, the cost to go to 4 layers may be less than you think
and in my opinion worth the difference.  You REALLY want to have a solid ground
plane and the 4-layer would allow your bypass components to go on the back
of the board.  In addition, using the other inner layer as a split plane for power
gives some additional high-speed decoupling you won't get with any amount of
capacitors on a two-layer construction.
 
Regards,
Gabor
-- Gabor
2019-6-20 12:04:31 评论

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我的猜测是,如果你的底层没有太多分解,你可以逃脱2层,你的绕行是好的。
但只有2层,很难得到一个不像瑞士奶酪的地平面。
我们使用4层板进行了3E-500 PQ208设计,几年前每个电源引脚都有0.1uF陶瓷盖,效果很好。
将帽盖靠近针脚,使用较重的迹线进行供电。
一个大的上限,比如每个电压在船上的某个地方至少有10uF的低ESR。
只是基本的良好布局实践。
我发现1.2V核心产生了相当数量的散列,所以绕过它并使其远离模拟端。
我发现解耦非常有效的一件事是小铁氧体磁珠。
我们使用了1206外壳尺寸的Steward MI1206K601R-10。
我们刚刚采用了FT-36 BGA封装的3A-700设计--BGA并没有那么糟糕,现在有很多电路板供您焊接和喷涂,即使是少量......您还可以使用其他产品。
零件你自己。
球间距为1毫米,为您提供足够的空间来运行之间的痕迹。
吉姆

以上来自于谷歌翻译


以下为原文

My guess is that you can get away with 2 layers if your bottom layer is not too broken up, and your bypassing is good.  But with only 2 layers it is hard to get a ground plane that's not like swiss cheese. 
 
We did a 3E-500 PQ208 design using a 4 layer board, with a 0.1uF ceramic cap per power pin a couple of years ago and it worked well.  Put caps close to the pins, use heavier traces for power.  One big cap like at least 10uF low ESR somewhere on board for each voltage.  Just basic good layout practice.
 
I found that the 1.2V core generated a fair amount of hash, so bypass that well and keep it away from your analog side.  One thing I found really effective for decoupling is small ferrite beads.    We used Steward MI1206K601R-10 which are 1206 case size.
 
We just did a design with a 3A-700 in FT256 BGA package - the BGAs are not that bad and there are many board houses now that will solder and xray them for you, even small quantities ...  you can put on the rest of the parts yourself.  The ball spacing is 1mm which gives you enough room to run a trace between.
 
Jim
 
 
2019-6-20 12:12:09 评论

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亲爱的金伯利迪
您或其他人可以解释如何选择用于FPGA VCCINT / VCCAUX / MGTAVCC / VCCO或其他关键电源的磁珠以及它们的合适阻抗和直流电阻。
我没有在FPGA上看过Beads,你能不能参考一些设计。
但我在其他供应的某些电路板上看到了600欧姆或220欧姆阻抗的磁珠(除了上面提到的那些)。
最好的祝福
矩阵

以上来自于谷歌翻译


以下为原文

Dear Jimbrady
 
can you or someone else explain how to select the beads to use for the FPGA VCCINT/ VCCAUX/MGTAVCC/VCCO or other critical supplies and the suitable impedance and DC resistance for them. I have not seen Beads on the FPGA supplies , can you please refer to some design. but i have seen beads of 600 ohm or 220 ohm impedance in some boards on other supplies(other than those mentioned above).
 
 
best regards
 
Matrix
2019-6-20 12:26:49 评论

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矩阵,
建议你开始一个新线程来讨论你的电路板设计,这个主题与这个主题完全无关。
- 鲍勃埃尔金德
签名:新手的自述文件在这里:http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结:1。
阅读手册或用户指南。
你读过手册了吗?
你能找到手册吗?2。
搜索论坛(并搜索网页)以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题,开始新的主题!5。
学生:复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息(请与网页,数据表链接).7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章,那么我一无所获。

以上来自于谷歌翻译


以下为原文

Matrix,
 
Suggest you begin a new thread to discuss your board design, a subject which is entirely unrelated to this thread.
 
-- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.
2019-6-20 12:34:49 评论

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