n00b关于以太网的内核与VHDL的问题

我觉得你做了一个
完美的工作总结了这种情况以及为什么它沸腾了。
实际上，它沸腾了，因为你是忘恩负义，心胸狭隘，侮辱。
......我认为这个论坛应该得到一个快速的屁股。
如果你认为我需要踢一下屁股，那就说吧。
我只是这个论坛上的一个人，我不会假装只是这个论坛上的一个人。
当你在这整个论坛社区“离开”之后，当我们两个人之间毫无疑问是一次非常简短的交流之后，这个现实就没有了。
如果我错了，请指出我错的地方。
Xilinx允许这些论坛非常开放。
如果你想参加派对，可以这么说，欢迎你在这里花一些时间向我们展示你认为应该如何进行适当的论坛。
我去过 
现在研究这几个月，我可以说是xilinx
论坛在网络上落后于其他人。
我重复邀请 - 闲逛并帮助我们走到最前沿。
我没有制定规则，我在这里没有责任或权威，所以你不需要我的许可或祝福。
诚实并称自己为n00b显然会让专家视线而拒绝提供帮助。
你最初发布于周六下午，圣诞节假期前的周末。
那天晚上我回答了一个我真正认为对你有用的建议。
我可能不是“专家”，但我当然没有“视线”。
你怎么解释发生的事情有如此不同？
即使你的第一次侮辱性言论之后，我仍然努力帮助你，无论是否，文明有点想要。
我很高兴我的问题让他们有机会拒绝，所以他们可以 
他们绝望地提升他们的自尊心
需要。
你的和解与诚实的风格与我的不同。
到目前为止，你遇到的是一个***。
如果你有兴趣闲逛，我更愿意被证明是错的。
无论哪种方式，你都不会被我跟踪或骚扰。
感谢您对我们交流的简明扼要的解释。
问候，
鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

I think you did a perfect job summarizing this situation and why it boiled over.

Actually, it boiled over because you were ungrateful, closed-minded, and insulting.

... I think this forum deserved a swift kick in the butt.

If you think I need a kick in the butt, then just say that.  I'm just one guy on this forum, I don't pretend to be anything more than just one guy on this forum.  This reality eluded you when you 'went off' on this entire forum community, after what was unarguably a very brief exchange between the two of us alone.  If I'm wrong on this, please point to where I'm mistaken.
 
Xilinx has allowed these forums to be pretty open.  If you want to join the party, so to speak, you are welcome to spend some time here and show us how you think a proper forum should be conducted.

I've been researching this for a few months now, and I can say that the xilinx forum lags way behind others on the net.

I repeat the invitation -- hang around and help bring us to the forefront.  I don't make the rules and I have no position of responsibility or authority here, so you don't need my permission or blessing.

Being honest and calling myself a n00b obviously makes experts look away and refuse to help.

You originally posted early Saturday afternoon, the weekend before Christmas holidays.  I responded that same evening with a suggestion which I genuinely thought to be useful to you.  I may not be an "expert", but I certainly didn't "look away".  How do you interpret what happened so differently?  Even after your first insulting remarks, I still made an effort to help you, n00b or not, civility somewhat wanting.

I'm glad my question gave them the opportunity of  refusal so they could  prop their egoes up with the hefty exaltation that they desperately need.

Your style of reconciliation and honesty is different than mine.
 
You come across as a bit of a jerk, so far.  If you're interested in hanging around, I'm more than willing to be proven wrong. Either way, you won't be stalked or harassed by me.
 
Thank you for the plain-spoken explanation of our exchanges.
 
Regards,
 
Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

鲍勃，不，我不认为你应该在屁股上踢。
显然我误解了你，当我说你“知道答案”时指的是我的论坛。
我已经多次遇到过这个论坛，并且看到了大量的空白回复和死胡同，尤其是我所支付的产品spartan-3e，因为它已经开发给了开发者，我希望看到过多的*
功能强大*易于使用的开源设计。
在xilinx的页面上确实有很多设计，但是很少有设计在没有崩溃工具链的情况下工作，它们都不能从一个版本的ISE / EDK工作到另一个版本，并且它们不完整或有限（即TCP运行6小时，或VGA限制）
到256色等）。
所以屁股上的一脚goes goes goes goes said said said said said said said said said said said said said said said said said said said said said said said said said said said said
以及所有其他有这种态度但没有发出声音的人。
巴斯曼，我可以肯定地看到硬件设计的风险如何。
我见过许多电路板，特别是在早期的电脑中，它们使用绕线器进行了“售后市场”，并且只能想知道公司必须花多少钱来重新制作这些电路板。
我在创业公司中简单地将其作为一名技术人员实习，我知道打印新的电路板的成本是多少。
如果我进来并询问为什么我设计的某些电路板不起作用，为什么我不能在振荡器旁边运行一些敏感的迹线，或者为什么我的电路在RF组件周围没有屏蔽的情况下无法工作，我会
完全理解人们会如何烦恼，不想为我做我的工作。
我要强调的是，我不是在建造一块板，至少不是我的斯巴达以外的板。
我知道VHDL会在电路板内外创建信号和端口，但是我的电路板已经完成，理论上应该可以正常工作，并以一种暗示它有效的方式进行营销，但它并没有。
如果我试图将PHY和MII焊接到FPGA中，那么我将承担确保设计工作的负担。
但有人已经这样做了。
迹线转到PHY。
我支付了电路板和工具，在破坏的工具链中的某个地方是使其工作的核心，但我仍然应该自己构建它，好像我正在添加一个全新的hw组件。
我绝对会在这里发布解决方案，如果我想出来的话。
我确实从昆士兰大学找到了一个tcp堆栈。
如果我可以使用spartan-3e进行设计，我会在这里发布整个目录。
这对任何人都不重要，但我并不是在考虑设计一个硬件。
我只是想使用FPGA来做更快的事情，现有的软件能够很好地完成。
如果它可以帮助人们并给他们一个开始的地方，我相信人们会改进它，其中一些人会重新发布他们的解决方案。
仅仅是因为要求TCP / IP的人数众多，显然这将是一个巨大的贡献。
我会及时向大家发布。



以下为原文

Bob, no I dont think you deserve a kick in the butt. And apparently I misunderstood you when I said that you "knew the answer anyway" when pointing me to the forum. I've come across this forum numerous times and seen tons of blank replies and dead-end threads, particularly with the spartan-3e which is a product I paid for and since it's marketed to developers, I would expect to see a plethora of *functional* easy-to-use open-source designs for it. There are indeed many designs on xilinx's page, but few of them work without crashing the toolchain, none of them work from one version of ISE/EDK to another, and they are incomplete or limited (i.e. TCP runs for 6 hours, or VGA limited to 256 colors, etc ). So the kick in the butt goes to the guy that said "Personally I read your request for help, and thought “oh another programmer” and turned the page." and all of the others with that attitude who don't give a hoot.
 
Bassman, I can definitely see how the stakes are high with hardware design. I have seen many boards, particularly in the early days of pcs, that had "aftermarket" paches done with wire wrap and can only wonder how much that must have cost the companies to have to rework those boards. I briefly interned as a hw tech in a startup and I know how costly it was to print new revs of boards. If I came in here and asked why some board I designed doesn't work, why I can't run some sensitive trace right next to an oscillator, or why my circuit doesn't work without a shield around the RF components, I would fully understand how people would be irritated and not want to do my job for me.
 
I will emphasize that I'm not building a board, at least not one that exists outside of my spartan. I know that VHDL creates signals and ports in and out of the board, but my board is finished and should theoretically work, is marketed in a way that suggests it works, and yet it doesnt. If I tried to solder a PHY and MII into the FPGA, then I would bear the burden of ensuring the design works. But someone already did that. The traces go to the PHY. I paid for the board and tools, somewhere in the broken toolchain is the core to make it work, and yet I'm still supposed to build it myself as if I were adding an entirely new hw component.
 
I absolutely will post the solution here, if and when I figure it out. I did find a tcp stack from queensland university. If I can get that design to work with the spartan-3e I will post teh whole directory here. Not that it matters to anyone, but I'm not really looking into designing a piece of hardware. I just want to use the FPGA to do something faster that existing software is very well capable of. If it can help people out and give them a place to start, I'm sure people will improve on it and some of them will repost their solutions. Just for the sheer number of people asking for TCP/IP, clearly this would be a great contribution. I will keep you posted.
 
 

鲍勃，不，我不认为你应该在屁股上踢。
我同意，我认为这个论坛也不值得一试。
如果你骗我，我不在乎。
你扯掉了所有人，这就是我的回应。
这对我来说是个热门话题。
你来到这里参观，30秒后（比喻说）你正在扔手榴弹。
所以屁股的一脚踢到那个说“我个人读过的人”
你的帮助请求，并想“哦另一个程序员”并转向
页面。“以及所有其他有这种态度但没有给出的人
叱。
到编写和发布时，你已经挖了一个相当大的漏洞 - 写这篇评论的人在这部剧中完全无可指责。
在埃德马斯里的不朽的话语[艾琳布罗科维奇电影]：
他们教美女王道歉吗？
因为你吮吸它！
这篇帖子中没有任何内容可以撼动你的世界。
也许这可以帮助你理解我（和其他人）如何看待你。
也许不会。
你从错误的脚开始，但是从这里开始无处可去（请不要测试这个断言！）。
如果你想重新开始，这不是一个坏主意。
我们大多数人都有短暂的记忆和注意力（当然适用于我）。
但首先，你需要停止挖掘。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

Bob, no I dont think you deserve a kick in the butt.

I agree, and I don't think the forum deserves a kick in the butt either.  I don't care if you rip on me.  You ripped on everyone, and that's what provoked my response.  That's a hotbutton for me.  You came here to visit, and 30 seconds later (figuratively speaking) you were tossing hand grenades.

So the kick in the butt goes to the guy that said "Personally I read your request for help, and thought “oh another programmer” and turned the page." and all of the others with that attitude who don't give a hoot.

By the time that was written and posted, you had already dug yourself a considerable hole -- and the fellow who wrote that comment is entirely blameless in this drama.
 
In the immortal words of Ed Masry [Erin Brokovich movie]:

Do they teach beauty queens to apologize? Because you suck at it!

Nothing said in this thread is going to shake your world.  Maybe this helps you to understand how I (and others) see you.  Maybe not.  You started off on the wrong foot, but there's nowhere to go but up from here (and please don't test this assertion!).  If you want to start over again, that's not a bad idea.  Most of us have short memories and attention spans (certainly applies to me).  But first, you'll need to stop digging.
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

您是否知道只有10分钟写愤怒的帖子与1小时步行有相同的健康益处？
嗯，谢谢你，阿德里安。
我想我至少在明年春天的中期完全被我的运动所吸引！
您是否有可能知道阅读愤怒帖子可能带来的健康益处？
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

Did you know that just 10 minutes of writing angry posts have the same health benefits as a 1 hour walk?

Well, thank you for that, Adrian.  I think I'm fully caught up on my exercise through the middle of next Spring, at least!
Any chance you might know what could be the health benefits of reading angry posts?
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

那么到目前为止这肯定是一个有趣的线程......;）
IP堆栈的主题是一个看似频繁的主题。
如果您没有看到它，这是最近的一个帖子：
http://forums.xilinx.com/t5/Connectivity/TCP-IP-directions/m-p/111782
还有相当多的项目或示例使用常见的Xilinx / Digilent Spartan-3E入门套件（S3ESK）：
http://www.xilinx.com/products/boards/s3estarter/reference_designs.htmhttp://whoyouvotefor.info/ethernet.html(Spartan 3E入门套件上的以太网开放核心集成）http：//www.frank-buss。
德/ VHDL / spartan3e.htmlhttp：//www.fpga.synth.net/pmwiki/pmwiki.php N = Main.HomePagehttp：//www.ccm.ece.vt.edu/twiki/bin/view/Main/
Spartan3Radiohttp：//read.pudn.com/downloads150/doc/project/646959/24128_Howto%20setup%20uClinux%20for%20the%20Spartan%203E%20Starter%20kit_artikel.pdf（如何为Spartan 3E入门套件设置uClinux）http：
//www.skippari.net/projects/?p=187(Spartan 3E入门套件逻辑分析仪）
我相信还有更多的东西 - 这就是我以前看过的笔记。
BT



以下为原文

Well this has certainly been an interesting thread so far... ;)
 

除了bt共享的内容之外，Avnet还创建了许多可能有用的示例设计。
不幸的是，我不确定这些是否会出现在搜索引擎中。
我看到我们使用MicroBlaze，Ethernet Lite MAC和Spartan-3E入门套件的lwip堆栈进行TCP / IP设计： 
http://www.em.avnet.com/xlxs3estarterkit  - >支持文件＆amp;
下载 - > S3500E网络性能示例Emaclite
不幸的是，我们的设计已经过时了。
该套件已存在多年，我们尚未积极更新此套件的设计，因此您将看到最新的套件基于EDK 9.2。
如果您希望看到更新的v12软件，那么您可以查看Spartan-6 LX16评估套件或Spartan-6 LX150T开发板的可用示例。
这些也是使用带有MAC内核和软件堆栈的FPGA上的MicroBlaze的示例。 
http://www.em.avnet.com/spartan6lx16-evl  - >支持文件＆amp;
下载 
http://www.em.avnet.com/spartan6lx150t-dev  - >支持文件＆amp;
下载
一般情况下，您可以访问www.em.avnet.com/drc  - > Xilinx浏览Avnet提供的产品
布赖恩



以下为原文

In addition to what bt has shared, Avnet also creates a number of example designs which might prove useful.  Unfortunately, I'm not sure that these show up with the search engines.  I see we have a TCP/IP design using MicroBlaze, the Ethernet Lite MAC, and the lwip stack for the Spartan-3E Starter Kit:
  http://www.em.avnet.com/xlxs3estarterkit --> Support Files & Downloads --> S3500E Network Performance Example Emaclite
 
Unfortunately, our design is out-of-date.  This kit has been around for several years, and we have not been actively updating the designs for this kit, so you'll see the latest one is based on EDK 9.2.
 
If you would like to see something more recent with v12 software, then you could look at the examples available for the Spartan-6 LX16 Evaluation Kit or the Spartan-6 LX150T Development boards.  These are also examples using MicroBlaze on the FPGA with a MAC core and a software stack.
  http://www.em.avnet.com/spartan6lx16-evl --> Support Files & Downloads
  http://www.em.avnet.com/spartan6lx150t-dev --> Support Files & Downloads
 
In general, you can browse what Avnet has to offer by going to www.em.avnet.com/drc --> Xilinx
 
Bryan
 

xilinx_temp_9099写道：
鲍勃，不，我不认为你应该在屁股上踢。
显然我误解了你，当我说你“知道答案”时指的是我的论坛。
我已经多次遇到过这个论坛，并且看到了大量的空白回复和死胡同，尤其是我所支付的产品spartan-3e，因为它已经开发给了开发者，我希望看到过多的*
功能强大*易于使用的开源设计。
那些针对（老化）Spartan 3E入门套件的开源设计必须由有兴趣创建针对该板的开源设计的人开发。
开源是其核心所有关于抓痒的全部内容。
无论出于何种原因，“社区”并没有为这个董事会做出很多设计。
我意识到这不符合你的期望。
这不是Xilinx的错，也不是本论坛常客的错。
这就是它的方式。
顺便说一句，我有那块板，我用它来运行与timpe帖子相关联的那个漂亮的逻辑分析仪。
在挖掘和寻找HP1661的工作台空间方面击败了他们。
----------------------------是的，我这样做是为了谋生。



以下为原文

 

xilinx_temp_9099 wrote:
Bob, no I dont think you deserve a kick in the butt. And apparently I misunderstood you when I said that you "knew the answer anyway" when pointing me to the forum. I've come across this forum numerous times and seen tons of blank replies and dead-end threads, particularly with the spartan-3e which is a product I paid for and since it's marketed to developers, I would expect to see a plethora of *functional* easy-to-use open-source designs for it.
 

 
Those open-source designs that target the (aging) Spartan 3E starter kit would have to be developed by people interested in creating open-source designs that target that board. Open source is, at its core, all about scratching an itch. For whatever reason, "The community" hasn't contributed many designs for this board. I realize that this doesn't meet your expectations. This is not Xilinx' fault, nor is it the fault of the regulars on this forum. It's just the way that it is.
 
BTW, I have that board, and I use it to run that nifty logic analyzer linked to in timpe's post. Beats the heck out of digging out and finding bench space for the HP1661.
----------------------------Yes, I do this for a living.

多谢你们。
我将研究这些链接，每当我到达某处时，我都会发布我所拥有的内容。
昆士兰IP堆栈看起来很有前景，所以我会先尝试使用它。
Bassman，如果还有另一个1gbe或100gbe的评估板，我知道肯定能够工作并且低于500美元我会买它，但我不希望它变成另一个像这样的惨败。
对于那些厌恶n00b想要免费代码的硬核硬件工程师：我确定你们都没有使用过硬件供应商数据表中包含的免费参考设计或示例。
这将是作弊。
：smileyhappy：
大家圣诞快乐。



以下为原文

Thanks guys. I will look into those links and whenever I get somewhere with this I will post whatever I have. The queensland IP stack looks promising so I will try working with that first.
 
Bassman, If there were another eval board with a 1gbe or 100gbe that I knew for sure worked and was under $500 I would buy it, but I dont want it to turn into another fiasco like this one did.
 
To the hardcore hardware engineers among you that resent a n00b wanting free code: I'm sure none of you ever use the free reference designs or examples that are included in a hardware vendor's datasheet. That would be cheating. :smileyhappy:
 
Merry Christmas everyone.
 

xilinx_temp_9099写道：
多谢你们。
我将研究这些链接，每当我到达某处时，我都会发布我所拥有的内容。
昆士兰IP堆栈看起来很有前景，所以我会先尝试使用它。
Bassman，如果还有另一个1gbe或100gbe的评估板，我知道肯定能够工作并且低于500美元我会买它，但我不希望它变成另一个像这样的惨败。
你不会找到一个支持千兆以太网的电路板，因为它可能有一个Virtex系列FPGA，并且它们并不便宜。
至于它是否支持你想要做的事情......由于我所说的原因，无法帮助你。
对于那些厌恶n00b想要免费代码的硬核硬件工程师：我确定你们都没有使用过硬件供应商数据表中包含的免费参考设计或示例。
这将是作弊。
：smileyhappy：
如果你打开了核心生成器，你会发现Xilinx确实提供了大量可以使用的免费核心。
诸如存储器接口，UART，SPI和I2C接口之类的东西，很多很多东西。
它们是否对生产设计有用是一项不幸遗留给工程师的练习（简短回答：一般来说，不，它们对生产设计没有用）。
但即使Xilinx提供了大量示例，它们也无法提供解决每个人问题的代码。
毕竟，这是设计工程师的工作 - 解决问题。
而且你仍然忽略了这一点：你遇到的问题是其他人没有表现出对解决方案的兴趣（或者如果他们已经解决了这个问题，他们会因为已经讨论过的原因而保留其专有权）。
所以，如果你想解决问题，那就做一名工程师吧。
并且，在完成之后，如果您如此倾向，请将其发布在OpenCores或任何地方。
祝你好运。
----------------------------是的，我这样做是为了谋生。



以下为原文

 

xilinx_temp_9099 wrote:

Thanks guys. I will look into those links and whenever I get somewhere with this I will post whatever I have. The queensland IP stack looks promising so I will try working with that first.
 
Bassman, If there were another eval board with a 1gbe or 100gbe that I knew for sure worked and was under $500 I would buy it, but I dont want it to turn into another fiasco like this one did.

 
 
 
You're not going to find a board that supports gigabit ethernet for under a grand, as it likely has a Virtex-family FPGA and those aren't cheap. As for whether it supports what you want to do ... can't help you for reasons I've stated.
 
 
 
To the hardcore hardware engineers among you that resent a n00b wanting free code: I'm sure none of you ever use the free reference designs or examples that are included in a hardware vendor's datasheet. That would be cheating. :smileyhappy: 
 

 
If you opened up the Core Generator, you'll see that Xilinx does indeed provide a wealth of free cores that you can use. Things like memory interfaces, UARTs, SPI and I2C interfaces, lots and lots of stuff. Whether they are useful for production designs is an exercise that's unfortunately left up to the engineer (short answer: generally, no, they are not useful for production designs).
 
But even though Xilinx provides a lot of examples, they cannot possibly provide code that solves everyone's problems. After all, that is the job of the design engineer -- to solve problems. And you're still missing the point: you have a problem that nobody else has shown interest in solving (or if they have solved it, they keep it proprietary for reasons already discussed). So, if you want the problem solved, be an engineer and do it. And, after doing it, if you're so inclined, publish it on OpenCores or wherever.
 
Good luck.
----------------------------Yes, I do this for a living.

Bassman，如果还有另一个1gbe或100gbe的评估板，我知道肯定能够工作并且低于500美元我会买它，但我不希望它变成另一个像这样的惨败。
您目前使用的电路板是否工作不正常？
如果它有缺陷，那么你应该退货。
阿德里安
请在询问之前先查询您的问题。如果有人回答您的问题，请在“接受为解决方案”标记该帖子。
如果你看到一个特别好的和信息丰富的帖子，考虑给它Kudos（左边的星）。



以下为原文

 

Bassman, If there were another eval board with a 1gbe or 100gbe that I knew for sure worked and was under $500 I would buy it, but I dont want it to turn into another fiasco like this one did.

 
Is the board you're currently using not working? If it is defect, then you should return it.
 
 
Adrian

Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

它们是否对生产设计有用是一项不幸遗留给工程师的练习（简短回答：一般来说，不，它们对生产设计没有用）。
我很好奇：为什么不呢？
请在询问之前先查询您的问题。如果有人回答您的问题，请在“接受为解决方案”标记该帖子。
如果你看到一个特别好的和信息丰富的帖子，考虑给它Kudos（左边的星）。



以下为原文

 

Whether they are useful for production designs is an exercise that's unfortunately left up to the engineer (short answer: generally, no, they are not useful for production designs).

I'm curious: why not?
 

Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

eteam00写道：
阿德里安，那太可笑了。
我喜欢。
这是我们尚未见过的一面。
我应该将droll wit添加到我所有FPGA设计人员所需的字符属性列表中。
- 鲍勃埃尔金德
而不是“闪亮的机智”呢？
：smileywink：
------------------------------------------“如果它不起作用
模拟，它不会在板上工作。“



以下为原文

 

eteam00 wrote:
Adrian, that was quite droll.  I like it.  This is a side of you we've not yet seen.
 
I should add droll wit to my list of character attributes required of all FPGA designers.
 
- Bob Elkind

 
And not "shining wit", then?
:smileywink:

------------------------------------------
"If it don't work in simulation, it won't work on the board."

而不是“闪亮的机智”呢？
欢迎您开始自己的列表，但我认为droll散发出低调的自信，这对FPGA设计人员来说最为明显。
闪耀对我的口味有点过于华丽。
软件类型可能会显示出闪亮的智慧，而我们的FPGA设计人员将采取更柔和，更少炫耀的风度。
我们将拒绝担任。
嗯，我尊敬的同事，你说什么？
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

And not "shining wit", then?

You are welcome to start your own list, but I think droll exudes a low-key self-confidence which is most becoming to FPGA designers.  Shining is a bit too flashy for my tastes.  Software types might show shining wit, while we FPGA designers will take on a more subdued and less ostentatious demeanour.  We shall refuse to preen.
 
Well, my esteemed colleagues, what say you?
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

实际上，我是一个软件人，因为我是一个硬件人。
在我的心里，我是优化类型 - 跨越软件和硬件：smileyhappy：
请在询问之前先查询您的问题。如果有人回答您的问题，请在“接受为解决方案”标记该帖子。
如果你看到一个特别好的和信息丰富的帖子，考虑给它Kudos（左边的星）。



以下为原文

Actually, I'm as much a software guy as I'm a hardware guy. Deep in my heart, I'm the optimization type – and that spans software and hardware :smileyhappy:
 
 

Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

实际上，我是一个软件人，因为我是一个硬件人。
在我的深处
我是优化类型 - 它涵盖了软件和硬件
那会让你......半光泽，半滑溜溜？
对不起，你的机智和你的作品背叛了你。
毫无疑问，您的核心是FPGA设计师。
否则你不可能说服我。
相反的抗议活动将落在聋耳，精英的耳朵上！
:)
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

Actually, I'm as much a software guy as I'm a hardware guy. Deep in my heart, I'm the optimization type – and that spans software and hardware

And that makes you...  half shiny and half droll?
 
Sorry, your wit and your writings betray you.  You are undoubtedly an FPGA designer at your core.  You can't possibly convince me otherwise.  Your protests to the contrary will fall on deaf, elitist ears!  :)
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

awillen写道：
它们是否对生产设计有用是一项不幸遗留给工程师的练习（简短回答：一般来说，不，它们对生产设计没有用）。
我很好奇：为什么不呢？
啊，你没有尝试过实际使用Xilinx千兆以太网核心的不幸......
----------------------------是的，我这样做是为了谋生。



以下为原文

 

awillen wrote:
 

Whether they are useful for production designs is an exercise that's unfortunately left up to the engineer (short answer: generally, no, they are not useful for production designs).

I'm curious: why not?
 

 
Ah, you haven't had the misfortune of trying to actually use the Xilinx gigabit Ethernet core ...
----------------------------Yes, I do this for a living.

那会让你......半光泽，半滑溜溜？
一个闪亮的漫步？
否则你不可能说服我。
相反的抗议活动将落在聋耳，精英的耳朵上！
:)
这必须是硬件设计的原因，因为据称我们都有这个特点。
阿德里安
请在询问之前先查询您的问题。如果有人回答您的问题，请在“接受为解决方案”标记该帖子。
如果你看到一个特别好的和信息丰富的帖子，考虑给它Kudos（左边的星）。



以下为原文

 

And that makes you...  half shiny and half droll?

A shiny dtroll?
 
 
 

You can't possibly convince me otherwise.  Your protests to the contrary will fall on deaf, elitist ears!  :)

 
That must be caused by the hardware design stuff, since allegedly we all share that trait.
 
 
Adrian

Please google your question before asking it.
If someone answers your question, mark the post with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left).

那会让你......半光泽，半滑溜溜？
一个闪亮的漫步？
dtroll？
对于demi-droll而言是那个公制欧元峰值，就像半滑车一样？
什么是demi-droll的另一半，ashton-droll？
（曾经是布鲁斯 - 戴尔）？
- 鲍勃“随机”Elkind
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

And that makes you...  half shiny and half droll?
A shiny dtroll?

dtroll?  is that metric eurospeak for demi-droll, as in half-droll?
 
What is the other half of a demi-droll, an ashton-droll?    (used to be a bruce-droll) ?
 
-- Bob "random" Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

只是一个更新，插入了wishbone开源TCP / IP代码，并且看哪，我已经被工具链中的另一个bug拦截了。
真是一个惊喜。
映射所有方程...错误：Xst：2033  - 输入缓冲区infrastructure_top0 / SINGLE_ENDED_CLKS_INST.SYS_CLK_INST的端口I连接到GNDERROR：Xst：1847  - 设计检查失败
在搜索此错误时，他们声称它是在ISE 8.1中启动的，但我在版本10.1.03上构建它。
显然他们有更好的事情要做，而不是解决它。
他们可能太忙于在他们的VHDL代码中写关于版权的50行法律评论，或者可能找到新的有趣方法来限制对评估IP核的访问或限制对其进行访问。
什么，但提高质量，是吧？



以下为原文

Just an update, inserted wishbone open-source TCP/IP code and lo and behold, I'm stopped dead in my tracks by another bug in the toolchain. what a surprise.
 
Mapping all equations...
ERROR:Xst:2033 - Port I of Input buffer infrastructure_top0/SINGLE_ENDED_CLKS_INST.SYS_CLK_INST is connected to GND
ERROR:Xst:1847 - Design checking failed
 
when searching for this error, they claim it started in ISE 8.1, yet I'm building this on version 10.1.03. So apparently they had better things to do than fix it. They were probably too busy writing 50-line legalese comments in their VHDL code about copyright, or maybe finding new and fun ways to limit the functionality of or restrict access to the evaluation IP cores. anything but improve quality, huh ?

>我在工具链中的另一个错误已经停止了。
多么惊喜.....
>错误：Xst：2033  - 输入缓冲区infrastructure_top0 / SINGLE_ENDED_CLKS_INST.SYS_CLK_INST的端口I连接到GND>错误：Xst：1847  - 设计检查失败
这不是ISE软件中的“错误”，这是您的HDL代码中的错误。
------您是否尝试在Google中输入问题？
如果没有，你应该在发布之前。太多结果？
尝试添加网站：www.xilinx.com



以下为原文

> I'm stopped dead in my tracks by another bug in the toolchain. what a surprise.....
> ERROR:Xst:2033 - Port I of Input buffer infrastructure_top0/SINGLE_ENDED_CLKS_INST.SYS_CLK_INST is connected to GND
> ERROR:Xst:1847 - Design checking failed
 
This isn't a "bug" in the ISE software, this is an error  in your HDL code.
------Have you tried typing your question into Google?  If not you should before posting.
Too many results?  Try adding site:www.xilinx.com