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我正在尝试编写相机界面,我的目标是使相机输出与“video_in_to_axi4_stream”IP兼容,基本上我正在缓冲视频输入,并在我生成兼容的视频信号之后。 我已经清楚,我必须保持高有效视频信号,而我正在传输像素,但我不清楚是否必须包括空白同步。 如果存在限制或最小值,我需要多少个时钟才能保持高hsync和vsync .... 使用videoIn_to_axi-stream IP核可以使用以下视频输出吗?: 非常感谢。 以上来自于谷歌翻译 以下为原文 Hello, I'm trying to write a camera interface, my goal is to make compatible the camera output with the "video_in_to_axi4_stream" IP basically I'm buffering the video input and after I'm generating the compatible video signals. I have clear that I have to keep high the active video signal while I'm transmitting the pixels but the bit I have not clear if is mandatory to include the blank syncs. signals and for another side how many clocks would I need to keep high hsync and vsync, if there's a limit or minimum.... Would it work the below video output with the videoIn_to_axi-stream IP core?: Many thanks. |
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不,它不正确。
我建议你再次使用core并模拟和比较时序波形 谢谢和RegardsBalkrishan ----------------------------------------------- ---------------------------------------------请将帖子标记为 一个答案“接受为解决方案”,以防它有助于解决您的查询。如果一个帖子引导到解决方案,请给予赞誉。 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 no its not correct . I would recommend you again use core and simulate and compare timing waveformsThanks and Regards Balkrishan -------------------------------------------------------------------------------------------- Please mark the post as an answer "Accept as solution" in case it helped resolve your query. Give kudos in case a post in case it guided to the solution.View solution in original post |
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您可以使用此IPhttps://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdf
谢谢和RegardsBalkrishan ----------------------------------------------- ---------------------------------------------请将帖子标记为 一个答案“接受为解决方案”,以防它有助于解决您的查询。如果一个帖子引导到解决方案,请给予赞誉。 以上来自于谷歌翻译 以下为原文 you can use this IP https://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdfThanks and Regards Balkrishan -------------------------------------------------------------------------------------------- Please mark the post as an answer "Accept as solution" in case it helped resolve your query. Give kudos in case a post in case it guided to the solution. |
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嗨,谢谢你的回复,但IP是axi流视频。
我还在输入视频界面(另一边)我的问题是,如果上面的vsync和hsync信号对于“视频输入到axi流”ip是正确的。 以上来自于谷歌翻译 以下为原文 Hi, thanks for the reply, but that IP is for axi stream video. I'm still at the input video interface (the other side) where my question is if the above vsync and hsync signals are correct for the "video in to axi stream" ip. |
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不,它不正确。
我建议你再次使用core并模拟和比较时序波形 谢谢和RegardsBalkrishan ----------------------------------------------- ---------------------------------------------请将帖子标记为 一个答案“接受为解决方案”,以防它有助于解决您的查询。如果一个帖子引导到解决方案,请给予赞誉。 以上来自于谷歌翻译 以下为原文 no its not correct . I would recommend you again use core and simulate and compare timing waveformsThanks and Regards Balkrishan -------------------------------------------------------------------------------------------- Please mark the post as an answer "Accept as solution" in case it helped resolve your query. Give kudos in case a post in case it guided to the solution. |
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